[PATCH 3/6] arm64: dts: socfpga: agilex5: enable eMMC 1.8V DDR on SoCDK eMMC

[tze . yee . ng]

From: Tze Yee Ng <tze.yee.ng@xxxxxxxxxx>

Add mmc-ddr-1_8v to the eMMC variant so the controller can use the
high-speed DDR (52 MHz) 1.8V eMMC mode in addition to the existing
HS200/HS400 modes.

Signed-off-by: Tze Yee Ng <tze.yee.ng@xxxxxxxxxx>
---
 arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_emmc.dts | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_emmc.dts b/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_emmc.dts
index beb4f444c471..52e3eeb98e8a 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_emmc.dts
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_emmc.dts
@@ -63,6 +63,7 @@ &sdmmc {
 	max-frequency = <200000000>;
 	mmc-hs200-1_8v;
 	mmc-hs400-1_8v;
+	mmc-ddr-1_8v;
 	no-sd;
 	no-sdio;
 	non-removable;
-- 
2.43.7