[PATCH 4/6] arm64: dts: socfpga: agilex5: enable SD card on SoCDK modular

[tze . yee . ng]

From: Tze Yee Ng <tze.yee.ng@xxxxxxxxxx>

Enable the micro-SD slot on the Agilex5 SoCDK modular board:

  - Add the fixed 3.3V card supply and the GPIO-controlled 1.8V/3.3V
    VQMMC I/O regulator driven by the on-SoM PCA9535 expander.
  - Enable the I2C3 bus and describe the PCA9535 expander that gates
    the SD I/O voltage switch.
  - Enable the sdmmc node in 4-bit mode with SDR104 and DDR50 UHS-I
    support, wire up the vmmc/vqmmc supplies, and set the board's
    DDR50 phony DQS timing.

Signed-off-by: Tze Yee Ng <tze.yee.ng@xxxxxxxxxx>
---
 .../intel/socfpga_agilex5_socdk_modular.dts   | 44 +++++++++++++++++++
 1 file changed, 44 insertions(+)

diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_modular.dts b/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_modular.dts
index a2b707ae6e9e..7b44c24412c2 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_modular.dts
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_modular.dts
@@ -34,6 +34,24 @@ memory@80000000 {
 		/* We expect the bootloader to fill in the reg */
 		reg = <0x0 0x80000000 0x0 0x0>;
 	};
+
+	vqmmc_io_reg: regulator-1p8v {
+		compatible = "regulator-gpio";
+		regulator-name = "sd-bus-io-power";
+		regulator-min-microvolt = <1800000>;
+		regulator-max-microvolt = <3300000>;
+		gpios = <&expander1 1 GPIO_ACTIVE_HIGH>;
+		states = <1800000 0x1>,
+			 <3300000 0x0>;
+	};
+
+	vmmc_reg: regulator-fixed-3p3v {
+		compatible = "regulator-fixed";
+		regulator-name = "card-power";
+		regulator-min-microvolt = <3300000>;
+		regulator-max-microvolt = <3300000>;
+		regulator-always-on;
+	};
 };
 
 &gpio0 {
@@ -61,6 +79,32 @@ emac2_phy0: ethernet-phy@0 {
 	};
 };
 
+&i2c3 {
+	status = "okay";
+
+	expander1: gpio@27 {
+		compatible = "nxp,pca9535";
+		reg = <0x27>;			/* SoM expander address */
+		gpio-controller;
+		#gpio-cells = <2>;
+	};
+};
+
+&sdmmc {
+	bus-width = <4>;
+	cap-sd-highspeed;
+	disable-wp;
+	max-frequency = <200000000>;
+	no-mmc;
+	sd-uhs-ddr50;
+	sd-uhs-sdr104;
+	vmmc-supply = <&vmmc_reg>;
+	vqmmc-supply = <&vqmmc_io_reg>;
+	cdns,ddr50-phony-dqs-timing = <0>;
+
+	status = "okay";
+};
+
 &osc1 {
 	clock-frequency = <25000000>;
 };
-- 
2.43.7