[PATCH 4/4] arm64: dts: qcom: shikra: add LCP/SRP ECC interrupt to LLCC node
From: Faiyaz Mohammed
Date: Wed Oct 14 2026 - 12:18:23 EST
Add a second interrupt for LCP/SRP DDR DRAM ECC reporting and
interrupt-names ("llcc-ecc", "llcc-lcp-ecc") to the Shikra LLCC node,
as required by the updated DT binding.
Signed-off-by: Faiyaz Mohammed <faiyaz.mohammed@xxxxxxxxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/shikra.dtsi | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/shikra.dtsi b/arch/arm64/boot/dts/qcom/shikra.dtsi
index 2623e139196f..ff572c003b39 100644
--- a/arch/arm64/boot/dts/qcom/shikra.dtsi
+++ b/arch/arm64/boot/dts/qcom/shikra.dtsi
@@ -1108,7 +1108,9 @@ llcc: system-cache-controller@e00000 {
reg-names = "llcc0_base",
"llcc1_base",
"llcc_broadcast_base";
- interrupts = <GIC_SPI 539 IRQ_TYPE_LEVEL_HIGH 0>;
+ interrupts = <GIC_SPI 539 IRQ_TYPE_LEVEL_HIGH 0>,
+ <GIC_SPI 538 IRQ_TYPE_LEVEL_HIGH 0>;
+ interrupt-names = "llcc-ecc", "llcc-lcp-ecc";
};
gcc: clock-controller@1400000 {
--
2.34.1