[PATCH 2/6] arm64: dts: socfpga: agilex5: enable SD UHS DDR50 on SoCDK

[tze . yee . ng]

From: Tze Yee Ng <tze.yee.ng@xxxxxxxxxx>

The SoCDK SD interface already advertises SDR104. Add sd-uhs-ddr50 so
the DDR50 UHS-I mode is available as well, using the DDR50 read-path
tuning defaults from the SoC dtsi.

Signed-off-by: Tze Yee Ng <tze.yee.ng@xxxxxxxxxx>
---
 arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts b/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts
index bc5b7956a720..8a22b05315a5 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts
@@ -63,6 +63,7 @@ &sdmmc {
 	disable-wp;
 	max-frequency = <200000000>;
 	no-mmc;
+	sd-uhs-ddr50;
 	sd-uhs-sdr104;
 	vmmc-supply = <&vmmc_reg>;
 	vqmmc-supply = <&vqmmc_io_reg>;
-- 
2.43.7