[PATCH] Nova: Move register definition into module using it

From: Antonin Malzieu Ridolfi

Date: Sat May 16 2026 - 12:15:15 EST


First babystep to split the register definitions grouped in nova root
register file to the module which actually use them.

Suggested-by: Alexandre Courbot <acourbot@xxxxxxxxxx>
Suggested-by: Danilo Krummrich <dakr@xxxxxxxxxx>
Signed-off-by: Antonin Malzieu Ridolfi <dev@xxxxxxxxxxx>
---
drivers/gpu/nova-core/gsp.rs | 1 +
drivers/gpu/nova-core/gsp/cmdq.rs | 3 ++-
drivers/gpu/nova-core/gsp/regs.rs | 11 +++++++++++
drivers/gpu/nova-core/regs.rs | 8 --------
4 files changed, 14 insertions(+), 9 deletions(-)
create mode 100644 drivers/gpu/nova-core/gsp/regs.rs

diff --git a/drivers/gpu/nova-core/gsp.rs b/drivers/gpu/nova-core/gsp.rs
index ba5b7f990031..756b9c75dc90 100644
--- a/drivers/gpu/nova-core/gsp.rs
+++ b/drivers/gpu/nova-core/gsp.rs
@@ -21,6 +21,7 @@
pub(crate) mod cmdq;
pub(crate) mod commands;
mod fw;
+mod regs;
mod sequencer;

pub(crate) use fw::{
diff --git a/drivers/gpu/nova-core/gsp/cmdq.rs b/drivers/gpu/nova-core/gsp/cmdq.rs
i
ndex 275da9b1ee0e..4d54350e8095 100644
--- a/drivers/gpu/nova-core/gsp/cmdq.rs
+++ b/drivers/gpu/nova-core/gsp/cmdq.rs
@@ -51,10 +51,11 @@
GSP_PAGE_SIZE, //
},
num,
- regs,
sbuffer::SBufferIter, //
};

+use super::regs;
+
/// Marker type representing the absence of a reply for a command. Commands using this as their
/// reply type are sent using [`Cmdq::send_command_no_wait`].
pub(crate) struct NoReply;
diff --git a/drivers/gpu/nova-core/gsp/regs.rs b/drivers/gpu/nova-core/gsp/regs.rs
new file mode 100644
index 000000000000..a76dea3c3ab0
--- /dev/null
+++ b/drivers/gpu/nova-core/gsp/regs.rs
@@ -0,0 +1,11 @@
+// SPDX-License-Identifier: GPL-2.0
+
+use kernel::io::register;
+
+// PGSP
+
+register! {
+ pub(super) NV_PGSP_QUEUE_HEAD(u32) @ 0x00110c00 {
+ 31:0 address;
+ }
+}
diff --git a/drivers/gpu/nova-core/regs.rs b/drivers/gpu/nova-core/regs.rs
index 6faeed73901d..d675afbb56b2 100644
--- a/drivers/gpu/nov
a-core/regs.rs
+++ b/drivers/gpu/nova-core/regs.rs
@@ -177,14 +177,6 @@ pub(crate) fn higher_bound(self) -> u64 {
}
}

-// PGSP
-
-register! {
- pub(crate) NV_PGSP_QUEUE_HEAD(u32) @ 0x00110c00 {
- 31:0 address;
- }
-}
-
// PGC6 register space.
//
// `GC6` is a GPU low-power state where VRAM is in self-refresh and the GPU is powered down (except
--
2.54.0

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