[PATCH 0/2] arm64: dts: qcom: sm8350: Scale L3 and memory bandwidth with the CPUs

[Demeter Barna via B4 Relay]

Add the EPSS L3 provider and CPU OPP tables that vote for LLCC, DDR and
L3 bandwidth with the CPU frequency, as on SM8550 and SM8650.

Tested on a Razer Edge 5G, whose board support is not upstream yet:
copy bandwidth on the A78 and X1 cores goes from 8 to 22-33 GB/s and
DDR latency from 200 to 125 ns. Idle power with the screen off does not
change; with the X1 busy on compute alone it rises by about 0.3 W.

---
Demeter Barna (2):
      arm64: dts: qcom: sm8350: Add the EPSS L3 provider
      arm64: dts: qcom: sm8350: Add CPU OPP tables with memory bandwidth

 arch/arm64/boot/dts/qcom/sm8350.dtsi | 347 +++++++++++++++++++++++++++++++++++
 1 file changed, 347 insertions(+)
---
base-commit: 4eb2586bd40db27d77cc5b724ca9386ed0c71d53
change-id: 20261016-sm8350-cpu-bw-7ce3e07fbe3a

Best regards,
--  
Demeter Barna <me@xxxxxxxxxxxxxxxxxxx>