RE: [PATCH v4 03/10] clk: realtek: Add basic reset support

[Yu-Chun Lin [林祐君]]

> On Fri, Mar 13, 2026 at 04:10:53PM +0800, Yu-Chun Lin wrote:
> > From: Cheng-Yu Lee <cylee12@xxxxxxxxxxx>
> >
> > Define the reset operations backed by a regmap-based register
> > interface and prepare the reset controller to be registered through
> > the reset framework.
> >
> > Signed-off-by: Cheng-Yu Lee <cylee12@xxxxxxxxxxx>
> > Co-developed-by: Yu-Chun Lin <eleanor.lin@xxxxxxxxxxx>
> > Signed-off-by: Yu-Chun Lin <eleanor.lin@xxxxxxxxxxx>
> > ---
> > Changes in v4:
> > - Add forward declaration for struct regmap in reset.h.
> > - Move struct rtk_reset_data definition into reset.c as it's only used there.
> > - Remove rtk_reset_reset() due to unnecessary implementation.
> > - Remove unnecessary parameter from rtk_reset_get_id().
> > ---
> >  MAINTAINERS                  |   1 +
> >  drivers/clk/Kconfig          |   1 +
> >  drivers/clk/Makefile         |   1 +
> >  drivers/clk/realtek/Kconfig  |  27 ++++++++++
> >  drivers/clk/realtek/Makefile |   4 ++
> >  drivers/clk/realtek/reset.c  | 104
> > +++++++++++++++++++++++++++++++++++
> >  drivers/clk/realtek/reset.h  |  28 ++++++++++
> >  7 files changed, 167 insertions(+)
> >  create mode 100644 drivers/clk/realtek/Kconfig  create mode 100644
> > drivers/clk/realtek/Makefile  create mode 100644
> > drivers/clk/realtek/reset.c  create mode 100644
> > drivers/clk/realtek/reset.h
> >
> > diff --git a/MAINTAINERS b/MAINTAINERS index
> > 9b7d64cc8d90..53a2f3575c37 100644
> > --- a/MAINTAINERS
> > +++ b/MAINTAINERS
> > @@ -22247,6 +22247,7 @@ L:    devicetree@xxxxxxxxxxxxxxx
> >  L:   linux-clk@xxxxxxxxxxxxxxx
> >  S:   Supported
> >  F:   Documentation/devicetree/bindings/clock/realtek*
> > +F:   drivers/clk/realtek/*
> >  F:   include/dt-bindings/clock/realtek*
> >
> >  REALTEK SPI-NAND
> > diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index
> > 3d803b4cf5c1..d60f6415b0a3 100644
> > --- a/drivers/clk/Kconfig
> > +++ b/drivers/clk/Kconfig
> > @@ -519,6 +519,7 @@ source "drivers/clk/nuvoton/Kconfig"
> >  source "drivers/clk/pistachio/Kconfig"
> >  source "drivers/clk/qcom/Kconfig"
> >  source "drivers/clk/ralink/Kconfig"
> > +source "drivers/clk/realtek/Kconfig"
> >  source "drivers/clk/renesas/Kconfig"
> >  source "drivers/clk/rockchip/Kconfig"
> >  source "drivers/clk/samsung/Kconfig"
> > diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index
> > f7bce3951a30..69b84d1e7bcc 100644
> > --- a/drivers/clk/Makefile
> > +++ b/drivers/clk/Makefile
> > @@ -140,6 +140,7 @@ obj-$(CONFIG_COMMON_CLK_PISTACHIO)
> += pistachio/
> >  obj-$(CONFIG_COMMON_CLK_PXA)         += pxa/
> >  obj-$(CONFIG_COMMON_CLK_QCOM)                += qcom/
> >  obj-y                                        += ralink/
> > +obj-$(CONFIG_COMMON_CLK_REALTEK)     += realtek/
> >  obj-y                                        += renesas/
> >  obj-$(CONFIG_ARCH_ROCKCHIP)          += rockchip/
> >  obj-$(CONFIG_COMMON_CLK_SAMSUNG)     += samsung/
> > diff --git a/drivers/clk/realtek/Kconfig b/drivers/clk/realtek/Kconfig
> > new file mode 100644 index 000000000000..121158f11dd1
> > --- /dev/null
> > +++ b/drivers/clk/realtek/Kconfig
> > @@ -0,0 +1,27 @@
> > +# SPDX-License-Identifier: GPL-2.0-only config COMMON_CLK_REALTEK
> > +     bool "Clock driver for Realtek SoCs"
> > +     depends on ARCH_REALTEK || COMPILE_TEST
> > +     default y
> > +     help
> > +       Enable the common clock framework infrastructure for Realtek
> > +       system-on-chip platforms.
> > +
> > +       This provides the base support required by individual Realtek
> > +       clock controller drivers to expose clocks to peripheral devices.
> > +
> > +       If you have a Realtek-based platform, say Y.
> > +
> > +if COMMON_CLK_REALTEK
> > +
> > +config RTK_CLK_COMMON
> > +     tristate "Realtek Clock Common"
> 
> Reset drivers go to reset directory.
>

Several vendors (e.g. qcom, mediatek, visconti) also place reset code in
drivers/clk/ when the reset controller is integrated with the clock controller.

> > +     select RESET_CONTROLLER
> > +     help
> > +       Common helper code shared by Realtek clock controller drivers.
> > +
> > +       This provides utility functions and data structures used by
> > +       multiple Realtek clock implementations, and include integration
> > +       with reset controllers where required.
> > +
> > +endif
> > diff --git a/drivers/clk/realtek/Makefile
> > b/drivers/clk/realtek/Makefile new file mode 100644 index
> > 000000000000..52267de2eef4
> > --- /dev/null
> > +++ b/drivers/clk/realtek/Makefile
> > @@ -0,0 +1,4 @@
> > +# SPDX-License-Identifier: GPL-2.0-only
> > +obj-$(CONFIG_RTK_CLK_COMMON) += clk-rtk.o
> > +
> > +clk-rtk-y += reset.o
> > diff --git a/drivers/clk/realtek/reset.c b/drivers/clk/realtek/reset.c
> > new file mode 100644 index 000000000000..45713785d76d
> > --- /dev/null
> > +++ b/drivers/clk/realtek/reset.c
> > @@ -0,0 +1,104 @@
> > +// SPDX-License-Identifier: GPL-2.0-only
> > +/*
> > + * Copyright (C) 2019 Realtek Semiconductor Corporation  */
> > +
> > +#include <linux/device.h>
> > +#include <linux/of.h>
> > +#include <linux/regmap.h>
> > +#include "reset.h"
>
> And here is the proof that none of your reset header constants are bindings -
> do you see the header here above? No.
>

The bank mapping is implicitly hardcoded in drivers:

Example: clk-rtd1625-crt.c

static struct rtk_reset_bank rtd1625_crt_reset_banks[] = {
    {.ofs = 0x0, .write_en = 1,},   /* Bank 0 */
    {.ofs = 0x4, .write_en = 1,},   /* Bank 1 */
    {.ofs = 0x8, .write_en = 1,},   /* Bank 2 */
    /* ... */
};

The array index implicitly corresponds to the bank ID in the header.
In v5, I will explicitly use the header defines to make this mapping
clear:

static struct rtk_reset_desc rtd1625_cc_reset_descs[] = {
	/* Bank 0: offset 0x000 */
	[RTD1625_CRT_RSTN_MISC] = {.ofs = 0x000, .bit = 0,  .write_en = 1},
  [RTD1625_CRT_RSTN_DIP]  = {.ofs = 0x000, .bit = 2,  .write_en = 1},
  /* ... */
};

Best regards,
Yu-Chun

> Best regards,
> Krzysztof