[PATCH] pinctrl: amd: Clear interrupt enable on spurious IRQ and skip unhandled EOI
From: Munique Feitoza
Date: Fri Oct 30 2026 - 15:51:25 EST
When do_amd_gpio_irq_handler() detects a spurious interrupt on a pin
that is not configured as an IRQ line (!gpiochip_line_is_irq()), it
currently only clears BIT(INTERRUPT_MASK_OFF) while leaving
BIT(INTERRUPT_ENABLE_OFF) set. Unlike amd_gpio_irq_disable(), leaving
INTERRUPT_ENABLE_OFF enabled allows the pin status bit to keep
re-asserting in WAKE_INT_STATUS_REG0/1. Clear both INTERRUPT_MASK_OFF
and INTERRUPT_ENABLE_OFF when disabling a spurious GPIO IRQ on both
main and RGPIO banks.
Additionally, if no GPIO interrupt was handled (ret == false), return
early before acquiring gpio_dev->lock and writing EOI_MASK to
WAKE_INT_MASTER_REG. This avoids unnecessary MMIO accesses and spinlock
contention when the IRQ line is shared or asserted by an unhandled
spurious interrupt storm.
Signed-off-by: Munique Feitoza <muniquefeitoz4@xxxxxxxxx>
---
drivers/pinctrl/pinctrl-amd.c | 8 +++++---
1 file changed, 5 insertions(+), 3 deletions(-)
diff --git a/drivers/pinctrl/pinctrl-amd.c b/drivers/pinctrl/pinctrl-amd.c
index 9fa752f55..428440949 100644
--- a/drivers/pinctrl/pinctrl-amd.c
+++ b/drivers/pinctrl/pinctrl-amd.c
@@ -671,7 +671,8 @@ static bool do_amd_gpio_irq_handler(int irq, void *dev_id)
raw_spin_lock_irqsave(&gpio_dev->lock, flags);
regval = readl(amd_gpio_pin_reg(gpio_dev, irqnr + i));
if (!gpiochip_line_is_irq(gc, irqnr + i)) {
- regval &= ~BIT(INTERRUPT_MASK_OFF);
+ regval &= ~(BIT(INTERRUPT_MASK_OFF) |
+ BIT(INTERRUPT_ENABLE_OFF));
dev_dbg(&gpio_dev->pdev->dev,
"Disabling spurious GPIO IRQ %d\n",
irqnr + i);
@@ -722,7 +723,8 @@ static bool do_amd_gpio_irq_handler(int irq, void *dev_id)
raw_spin_lock_irqsave(&gpio_dev->lock, flags);
regval = readl(amd_gpio_pin_reg(gpio_dev, pin));
if (!gpiochip_line_is_irq(gc, pin)) {
- regval &= ~BIT(INTERRUPT_MASK_OFF);
+ regval &= ~(BIT(INTERRUPT_MASK_OFF) |
+ BIT(INTERRUPT_ENABLE_OFF));
dev_dbg(&gpio_dev->pdev->dev,
"Disabling spurious GPIO IRQ %d\n",
pin);
@@ -735,7 +737,7 @@ static bool do_amd_gpio_irq_handler(int irq, void *dev_id)
}
/* did not cause wake on resume context for shared IRQ */
- if (irq < 0)
+ if (irq < 0 || !ret)
return false;
/* Signal EOI to the GPIO unit */
--
2.56.0