Re: [PATCH v15 10/16] PCI/CXL: Add CXL Device Reset sequencing

From: Srirangan Madhavan

Date: Thu Oct 29 2026 - 21:33:34 EST


On 10/27/26 8:01 PM, Li Ming wrote:
+     if (PCI_POSSIBLE_ERROR(status2))
+             return -ENODEV;
+     if (status2 & PCI_DVSEC_CXL_CACHE_INV)
+             return 0;
I think checking again after deadline is not needed, if it usually
happens, it means we should adjust CXL_CACHE_WBI_TIMEOUT_US.
+
+     return -ETIMEDOUT;
It is better to output a warning before returning -ETIMEDOUT.
+}
Ack. Fixes this in v16 and added warining.

+
+     idx = FIELD_GET(PCI_DVSEC_CXL_RST_TIMEOUT, cap);
+     if (idx >= ARRAY_SIZE(cxl_reset_timeout_ms)) {
+             pci_warn(pdev,
+                      "unknown CXL reset timeout encoding %d; using %u ms\n",
+                      idx, CXL_RESET_MAX_WAIT_MS);
+             idx = ARRAY_SIZE(cxl_reset_timeout_ms) - 1;
+     }
+
I noticed that the worst situation is that we have to wait cxl reset
done for 100s. If my understanding is correct, userspace would hang on
"echo 1 > reset" until reset done. Is it better to add a pci_info() here
to output the reset timeout value?

Done. Added a log print.

--
Regards,
Srirangan