[PATCH 09/14] media: qcom: camss: csid-gen2: Enable RDI SOF tracking

From: bryan . odonoghue

Date: Thu Oct 29 2026 - 05:56:45 EST


From: Bryan O'Donoghue <bryan.odonoghue@xxxxxxxxxx>

Add silicon specific changes to get SOF triggering V4L2_EVENT_FRAME_SYNC
'gen2' CSID. Covers SDM845, SDM670, SM6150, SM6350, SC7280, SC8280XP,
SM8250.

Tested thoroughly on sm8250 only for now. An additional patch is required
in camss.c to enable this functionality on a per-SoC basis.

Tested-by: Bryan O'Donoghue <bryan.odonoghue@xxxxxxxxxx> # sm8250
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@xxxxxxxxxx>
---
drivers/media/platform/qcom/camss/camss-csid-gen2.c | 15 +++++++++++++++
1 file changed, 15 insertions(+)

diff --git a/drivers/media/platform/qcom/camss/camss-csid-gen2.c b/drivers/media/platform/qcom/camss/camss-csid-gen2.c
index eadcb2f7e3aaa..a351ac4b91728 100644
--- a/drivers/media/platform/qcom/camss/camss-csid-gen2.c
+++ b/drivers/media/platform/qcom/camss/camss-csid-gen2.c
@@ -38,6 +38,8 @@
#define CSID_CSI2_RDIN_IRQ_SET(rdi) ((csid_is_lite(csid) ? 0x3C : 0x4C) \
+ 0x10 * (rdi))

+#define RDIN_IRQ_INFO_INPUT_SOF BIT(12)
+
#define CSID_TOP_IRQ_STATUS 0x70
#define TOP_IRQ_STATUS_RESET_DONE 0
#define CSID_TOP_IRQ_MASK 0x74
@@ -322,6 +324,16 @@ static void __csid_configure_rdi_stream(struct csid_device *csid, u8 enable, u8
writel_relaxed(val, csid->base + CSID_RDI_CFG0(port));
}

+static void __csid_configure_rdi_irq(struct csid_device *csid, u8 enable, u8 rdi)
+{
+ u32 val = 0;
+
+ if (enable)
+ val = RDIN_IRQ_INFO_INPUT_SOF;
+
+ writel_relaxed(val, csid->base + CSID_CSI2_RDIN_IRQ_MASK(rdi));
+}
+
static void csid_configure_stream(struct csid_device *csid, u8 enable)
{
struct csid_testgen_config *tg = &csid->testgen;
@@ -335,6 +347,7 @@ static void csid_configure_stream(struct csid_device *csid, u8 enable)

__csid_configure_rdi_stream(csid, enable, i, 0);
__csid_configure_rx(csid, &csid->phy, 0);
+ __csid_configure_rdi_irq(csid, enable, i);
__csid_ctrl_rdi(csid, enable, i);
}
}
@@ -373,6 +386,8 @@ static irqreturn_t csid_isr(int irq, void *dev)
if (csid->phy.en_vc & BIT(i)) {
val = readl_relaxed(csid->base + CSID_CSI2_RDIN_IRQ_STATUS(i));
writel_relaxed(val, csid->base + CSID_CSI2_RDIN_IRQ_CLEAR(i));
+ if (val & RDIN_IRQ_INFO_INPUT_SOF)
+ csid_sof_event(csid, i);
}

val = 1 << IRQ_CMD_CLEAR;

--
2.56.0