[Patch v5 14/18] perf/x86/intel: Account arch-PEBS in lbr_pebs_users

From: Dapeng Mi

Date: Thu Oct 29 2026 - 00:54:53 EST


lbr_pebs_users tracks how many PEBS events are currently using LBR.
It is updated for legacy PEBS events, but arch-PEBS events were missing
from that accounting.

Add the missing lbr_pebs_users accounting for arch-PEBS as well.

Reported-by: Sashiko <sashiko-bot@xxxxxxxxxx>
Closes: https://lore.kernel.org/all/sashiko-outbox-179823@xxxxxxxxxx/
Fixes: d243d0bb64af ("perf/x86/intel: Initialize architectural PEBS")
Signed-off-by: Dapeng Mi <dapeng1.mi@xxxxxxxxxxxxxxx>
---
arch/x86/events/intel/lbr.c | 4 ++--
arch/x86/events/perf_event.h | 7 +++++++
2 files changed, 9 insertions(+), 2 deletions(-)

diff --git a/arch/x86/events/intel/lbr.c b/arch/x86/events/intel/lbr.c
index 790580f96040..2c9c9cf42e94 100644
--- a/arch/x86/events/intel/lbr.c
+++ b/arch/x86/events/intel/lbr.c
@@ -618,7 +618,7 @@ void intel_pmu_lbr_add(struct perf_event *event)
* be 'new'. Conversely, a new event can get installed through the
* context switch path for the first time.
*/
- if (x86_pmu.intel_cap.pebs_baseline && event->attr.precise_ip > 0)
+ if (intel_pmu_has_pebs_lbr(event->pmu) && event->attr.precise_ip > 0)
cpuc->lbr_pebs_users++;
perf_sched_cb_inc(event->pmu);
if (!cpuc->lbr_users++ && !event->total_time_running)
@@ -689,7 +689,7 @@ void intel_pmu_lbr_del(struct perf_event *event)
if (event->hw.flags & PERF_X86_EVENT_LBR_SELECT)
cpuc->lbr_select = 0;

- if (x86_pmu.intel_cap.pebs_baseline && event->attr.precise_ip > 0)
+ if (intel_pmu_has_pebs_lbr(event->pmu) && event->attr.precise_ip > 0)
cpuc->lbr_pebs_users--;
cpuc->lbr_users--;
WARN_ON_ONCE(cpuc->lbr_users < 0);
diff --git a/arch/x86/events/perf_event.h b/arch/x86/events/perf_event.h
index 2b942a445038..82e0c20e435d 100644
--- a/arch/x86/events/perf_event.h
+++ b/arch/x86/events/perf_event.h
@@ -2085,6 +2085,13 @@ static inline bool intel_pmu_has_pebs(void)
return x86_pmu.ds_pebs || x86_pmu.arch_pebs;
}

+static inline bool intel_pmu_has_pebs_lbr(struct pmu *pmu)
+{
+ return x86_pmu.arch_pebs ?
+ !!(hybrid(pmu, arch_pebs_cap).caps & ARCH_PEBS_LBR) :
+ !!x86_pmu.intel_cap.pebs_baseline;
+}
+
#else /* CONFIG_CPU_SUP_INTEL */

static inline void reserve_ds_buffers(void)
--
2.34.1