Re: [PATCH 1/2] ASoC: es8328: describe the power-on register values in the regmap

[Mark Brown]

> The driver uses REGCACHE_MAPLE but does not provide reg_defaults, so the
> cache starts out empty: a register that has not been written yet is read
> back from the hardware and cached at that point. The two then drift
> apart whenever something else, such as the bootloader or a previous
> kernel, has left the codec in a non-default state, and the control
> values reported to userspace no longer describe the chip.

> Fill in the reset values from the ES8328 datasheet (Revision 1.0, the
> per-register sections 6.1.1 to 6.3.30) so the cache matches what the
> codec comes up with on power-up.

The driver should also add a reset of the hardware during I2C probe so
that the device is in a known state always, it looks like we have
ES8328_CONTROL1_SCP_RESET available for that, if not explicitly writing
out the defaults is probably the least bad option.

> +	{ ES8328_CONTROL1,	0x06 },
> +	{ ES8328_CONTROL2,	0x1c },

https://m5stack-doc.oss-cn-shenzhen.aliyuncs.com/1141/ES8388.pdf says
says this is 0x5c.

> +	{ ES8328_DACCONTROL3,	0x32 },

0x22.

> +	{ ES8328_DACCONTROL21,	0x38 },

0x0.  I'd check the other registers too.

>  const struct regmap_config es8328_regmap_config = {
>  	.reg_bits	= 8,
>  	.val_bits	= 8,
>  	.max_register	= ES8328_REG_MAX,
>  	.cache_type	= REGCACHE_MAPLE,
> +	.reg_defaults		= es8328_reg_defaults,

Please keep the indentation consistent.

-- 
Mark Brown <broonie@xxxxxxxxxx>