Re: [PATCH] PCI: Disable LTR on Qualcomm WCN7850 [17cb:1107] to allow ASPM L1.2

[Manivannan Sadhasivam]

On Mon, Oct 26, 2026 at 12:55:25PM +0530, Manivannan Sadhasivam wrote:
> On Fri, Oct 23, 2026 at 11:49:22PM +0200, Anthony Ruhier wrote:
> > On Fri, Oct 23, 2026 at 01:20:04PM -0500, Bjorn Helgaas wrote:
> > > By "firmware reports LTR value", do you mean that the WCN7850 sends an
> > > LTR Message with snooped/non-snooped values just below
> > > LTR_L1.2_THRESHOLD?
> > >
> > > And since the reported LTR values are never greater than or equal to
> > > LTR_L1.2_THRESHOLD, the link never enters L1.2?
> > 
> 
> This is correct.
> 
> > Not exactly. The firmware doesn't report a max snoop/no snoop that I could see
> > in lspci (it's set at 0ns), but if I set one with setpci, the card still
> > doesn't reach L1.2.
> 
> Max Snoop/No-Snoop latencies are supposed to be set by the host software, not
> the Endpoint firmware. The Endpoint firmware only uses these values to send
> their Snoop/No-Snoop latencies in the LTR message.
> 
> But there are two issues here in Qcom platforms:
> 
> 1. Neither the BIOS, nor the PCI core/pcie-qcom driver set the Max
> Snoop/No-Snoop latencies for the Endpoints/Upstream Ports based on the platform
> requirement.
> 
> 2. The L1_2_Threshold calculated by the PCI core doesn't match the Qcom platforms:
> 
> l1_2_threshold = 2 + 4 + t_common_mode + t_power_on;
> 
> On the Qcom platforms, T_POWER_ON is 0 by default. I initially misunderstood
> that the T_POWER_ON value of '0' was wrong. But after checking more, I
> understood that '0' was indeed the correct value, but there is one more
> parameter that we are not taking into account, which is TL10_REFCLK_ON time. It
> is ~40-80us depending on the platform.
> 
> Unfortunately, PCIe base spec didn't define any registers to pass the
> TL10_REFCLK_ON time to the OS. I'm planning to introduce a DT property, set
> it in Root Port node and take it account in the l1_2_threshold calculation.
> 
> Because of the issue (1), the Endpoint firmware reports 0 Snoop/No-Snoop
> latencies as the LTR latencies cannot exceed Max Snoop/No-Snoop latencies set
> by the host software. This is the behavior across all Endpoints connected to
> the Qcom host machines.
> 
> So if the LTR requirement bit is set, and the Endpoint sends 0 latencies in LTR
> message, then L1.2 is not entered all the time because, LTR > L1_2_Threshold.
> The spec mandates that the link should enter L1.2 only if LTR <= L1_2_Threshold.

Typo here. I got the condition inverted. Currently, LTR < L1_2_Threshold and
spec mandates LTR >= L1_2_Threshold for entering L1.2.

- Mani

-- 
மணிவண்ணன் சதாசிவம்