Re: [PATCH v8 00/15] perf annotate arm64: Support instruction tracking for data type profiling

[Tengda Wu]

On 2026/10/24 5:10, Arnaldo Carvalho de Melo wrote:
> On Wed, Oct 21, 2026 at 10:25:40AM +0800, Tengda Wu wrote:
>> Hi,
>>
>> On 2026/10/20 21:44, Tengda Wu wrote:
>>> This series adds arm64 support to perf's data type profiling by
>>> implementing instruction tracking for the arm64 architecture.
>>>
>>> The main changes since v7 include:
>>> v7: https://lore.kernel.org/all/cover.1791629326.git.wutengda@xxxxxxxxxxxxxxx/
>>>
>>>   * Patch 02: Minor optimizations to update_insn_state_arm64 to facilitate
>>>     future extension, including:
>>>     - Encapsulating call instruction handling into update_call_insn_state()
>>>     - Encapsulating invalidate dst regs handling into invalidate_unhandled_insn_regs()
>>>     - Renaming is_readonly_branch_or_cmp() to is_readonly_insn()
>>>     No functional changes.
>>>
>>>   * Fix issues raised by Sashiko:
>>>     - Patch 06: Complete the status register invalidation logic for
>>>       exclusive stores.
>>>     - Patch 13 & 15: Complete the lifetime invalidation logic for adrp
>>>       and mrs instructions.
>>>     Regarding the status register invalidation issue for instructions
>>>     such as cas/swp as well, we plan to support this incrementally
>>>     after the relevant instructions are refined; this patch temporarily
>>>     ignores and does not handle it (a TODO marker has already been
>>>     reserved in patch 02)
>>>
>>> Patch organization
>>> ==================
>>>
>>>   Patches 1-3:   Shared infrastructure. Extract invalidate_reg_state() as
>>>                  a common helper, add the arch_get_reg_offset() helper for
>>>                  computing operand base offsets, and wire up the arm64
>>>                  entry points (arch_supports_insn_tracking(),
>>>                  init_type_state(), and update_insn_state_arm64()).
>>>
>>>   Patches 4-6:   Core instruction tracking for arm64: function return
>>>                  types after calls, load instructions (ldr/ldp and their
>>>                  addressing modes), and store instructions (str/stp).
>>>
>>>   Patches 7-9:   Shared data structure improvements and an x86 fix.
>>>                  Expand type_state_reg.imm_value to u64 so 64-bit
>>>                  addresses can be tracked, preserve imm_value for stack
>>>                  variables, and delete stale stack state on store of an
>>>                  untracked register on x86.
>>>
>>>   Patches 10-15: Remaining arm64 patterns: stack variable tracking,
>>>                  'mov' (register and immediate forms), 'add' member
>>>                  address calculation, 'adrp' global variable tracking,
>>>                  per-cpu variable access, and 'mrs sp_el0' to resolve the
>>>                  'current' pointer.
>>>
>>
>> Just a quick note that this version of the patch series has addressed or
>> clarified all the Sashiko review comments. I would appreciate it if you
>> could take a look when you get a chance.
> 
> Merged now, test built and pushed to perf-tools-next/perf-tools-next for
> further build testing with linux-next, early next week I intend to push
> it out to Linus for 7.4.
> 
> - Arnaldo

Thanks a lot for the merge and for running the build tests. Much appreciated!

Best regards,
Tengda