[PATCH 4/4] arm64: dts: qcom: glymur: Add support for AV1E clock controller
From: Jagadeesh Kona
Date: Thu Oct 15 2026 - 09:45:09 EST
Add support for AV1 encoder clock controller (AV1ECC) node on
Qualcomm Glymur platform.
Signed-off-by: Jagadeesh Kona <jagadeesh.kona@xxxxxxxxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/glymur.dtsi | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/glymur.dtsi b/arch/arm64/boot/dts/qcom/glymur.dtsi
index 65a398c0a99208584797eaca8196348c617619af..da7548e6f1c555a01513c964dd974d45f07f7266 100644
--- a/arch/arm64/boot/dts/qcom/glymur.dtsi
+++ b/arch/arm64/boot/dts/qcom/glymur.dtsi
@@ -8146,6 +8146,22 @@ apps_smmu: iommu@15000000 {
dma-coherent;
};
+ av1ecc: clock-controller@15220000 {
+ compatible = "qcom,glymur-av1ecc";
+ reg = <0x0 0x15220000 0x0 0x14000>;
+ clocks = <&rpmhcc RPMH_CXO_CLK>,
+ <&gcc GCC_AV1E_AHB_CLK>;
+
+ power-domains = <&rpmhpd RPMHPD_MMCX>,
+ <&rpmhpd RPMHPD_MXC>;
+ required-opps = <&rpmhpd_opp_low_svs>,
+ <&rpmhpd_opp_low_svs>;
+
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ #power-domain-cells = <1>;
+ };
+
pcie_smmu: iommu@15480000 {
compatible = "arm,smmu-v3";
reg = <0x0 0x15480000 0x0 0x20000>;
--
2.34.1