Re: [PATCH v2 2/8] iio: adc: rzt2h: Wait for the analog part to stop after a forced stop

From: Lad, Prabhakar

Date: Wed Oct 14 2026 - 10:07:11 EST


Hi Andy,

Thank you for the review.

On Tue, Oct 13, 2026 at 3:55 PM Andy Shevchenko
<andriy.shevchenko@xxxxxxxxx> wrote:
>
> On Fri, Oct 09, 2026 at 07:41:16PM +0100, Prabhakar wrote:
>
> > When ADCSR.ADST is cleared to forcibly stop a conversion, the analog part
> > of the A/D converter can take up to 2 ADCLK cycles to stop operating.
> >
> > Wait for the write to ADCSR to complete and allow the analog part to stop
> > before reconfiguring or restarting the converter.
>
> ...
>
> > + /*
> > + * When a conversion is forcibly stopped, the analog part of the A/D
> > + * converter takes up to 2 ADCLK cycles to stop operating. Read back
> > + * ADCSR to make sure the write has reached the hardware before
> > + * starting the delay.
> > + */
> > + readw(adc->base + RZT2H_ADCSR_REG);
> > + ndelay(DIV_ROUND_UP(RZT2H_ADC_STOP_CYCLES * NSEC_PER_SEC,
> > + adc->adclk_rate));
>
> A single line (84 characters) is okay in this case.
>
> ndelay(DIV_ROUND_UP(RZT2H_ADC_STOP_CYCLES * NSEC_PER_SEC, adc->adclk_rate));
>
Ok, I will update it as above in the next version.

Cheers,
Prabhakar

> --
> With Best Regards,
> Andy Shevchenko
>
>