[PATCH v23 1/2] dt-bindings: pwm: opencores: Update compatibles, examples and maintainers
From: Hal Feng
Date: Wed Oct 14 2026 - 07:17:55 EST
Remove the jh8100 compatible since the JH8100 SoC has been canceled and
will not be released.
Change the register size in examples to 0x10, since an OpenCores PTC IP
has only 4 32-bit registers: CNTR, HRC, LRC and CTRL.
I will maintain this pwm module in place of William.
Tested-by: Maud Spierings <maud_spierings@xxxxxxxxxxx>
Acked-by: Conor Dooley <conor.dooley@xxxxxxxxxxxxx>
Fixes: 2529085831b0 ("dt-bindings: pwm: Add bindings for OpenCores PWM Controller")
Signed-off-by: Hal Feng <hal.feng@xxxxxxxxxxxxxxxx>
---
Documentation/devicetree/bindings/pwm/opencores,pwm.yaml | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/Documentation/devicetree/bindings/pwm/opencores,pwm.yaml b/Documentation/devicetree/bindings/pwm/opencores,pwm.yaml
index 52a59d245cdb..b15468f97b59 100644
--- a/Documentation/devicetree/bindings/pwm/opencores,pwm.yaml
+++ b/Documentation/devicetree/bindings/pwm/opencores,pwm.yaml
@@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: OpenCores PWM controller
maintainers:
- - William Qiu <william.qiu@xxxxxxxxxxxxxxxx>
+ - Hal Feng <hal.feng@xxxxxxxxxxxxxxxx>
description:
The OpenCores PTC ip core contains a PWM controller. When operating in PWM
@@ -23,7 +23,6 @@ properties:
- enum:
- starfive,jh7100-pwm
- starfive,jh7110-pwm
- - starfive,jh8100-pwm
- const: opencores,pwm-v1
reg:
@@ -49,7 +48,7 @@ examples:
- |
pwm@12490000 {
compatible = "starfive,jh7110-pwm", "opencores,pwm-v1";
- reg = <0x12490000 0x10000>;
+ reg = <0x12490000 0x10>;
clocks = <&clkgen 181>;
resets = <&rstgen 109>;
#pwm-cells = <3>;
--
2.43.2