Re: [PATCH] arm64: dts: qcom: sc8280xp: Fix GPU SMMU context fault interrupts

[Xilin Wu]

On 10/14/2026 4:59 PM, Konrad Dybcio wrote:
> On 10/13/26 11:59 AM, Xilin Wu wrote:
> > The GPU SMMU interrupt list includes PMU interrupts as the first two
> > context fault interrupts. This makes the driver register the fault
> > handlers for context banks 0 and 1 on SPIs 678 and 679 instead of 680
> > and 681. Translation faults are consequently left unhandled, which
> > can stall the GPU and prevent recovery.
>
> the context interrupts are 680-688 and 703
>
> Konrad

Thanks for the clarification. I limited the list to seven because IDR1 
reports NUMCB=7 on my board. However, DT should describe the full 
hardware interrupt list, and arm-smmu already ignores entries beyond the 
reported context-bank count. In EL2, IDR1 does report NUMCB=10. I'll 
include SPIs 680–688 and 703 in v2.

--
Best regards,
Xilin Wu <sophon@xxxxxxxxx>