[PATCH v3 1/2] dmaengine: dw-edma: Sort Register Field Macros by Bit Position

[Devendra K Verma]

Sort register field macros by bit position to improve readability.
No functional change.

Signed-off-by: Devendra K Verma <devverma@xxxxxxx>
Reviewed-by: Frank Li <Frank.Li@xxxxxxx>
---
Changes in v2:
  o Rebased to dma/next branch as per reviewer's suggestion

Changes in v1:
  o Corrected heading and body as per reviewer's suggestion
---
 drivers/dma/dw-edma/dw-edma-pcie.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/dma/dw-edma/dw-edma-pcie.c b/drivers/dma/dw-edma/dw-edma-pcie.c
index fab4faf68b77..83f8353d89d0 100644
--- a/drivers/dma/dw-edma/dw-edma-pcie.c
+++ b/drivers/dma/dw-edma/dw-edma-pcie.c
@@ -31,8 +31,8 @@
 
 #define DW_PCIE_XILINX_MDB_VSEC_DMA_ID		0x6
 #define DW_PCIE_XILINX_MDB_VSEC_ID		0x20
-#define DW_PCIE_XILINX_MDB_VSEC_DMA_BAR		GENMASK(10, 8)
 #define DW_PCIE_XILINX_MDB_VSEC_DMA_MAP		GENMASK(2, 0)
+#define DW_PCIE_XILINX_MDB_VSEC_DMA_BAR		GENMASK(10, 8)
 /* AMD CPM6 (Xilinx) supported cap */
 #define DW_PCIE_XILINX_CPM6_VSEC_CH_SEP		GENMASK(18, 16)
 #define DW_PCIE_XILINX_MDB_VSEC_DMA_WR_CH	GENMASK(9, 0)
-- 
2.43.0