[PATCH] arm64: dts: qcom: sdm845: Route the SPMI interrupt through the PDC
From: yoxcu
Date: Tue Oct 13 2026 - 17:36:30 EST
From: Michael Auer <mick@xxxxxxxx>
The SPMI arbiter interrupt (PMIC RTC alarm, power key, charger) goes
directly to GIC SPI 481. In CX collapse the GIC does not detect
interrupts, so only interrupts routed through the PDC can wake the SoC.
SPI 481 is PDC pin 1. Route the interrupt through the PDC, as sc7180,
sm8250 and sc8280xp already do.
On a OnePlus 6 in CX collapse, a 60 s RTC alarm did not end s2idle. The
phone slept for 456 s, until the modem woke it. With this change the
alarm wakes it on time (after 62 s), and the power key wakes it too.
Assisted-by: LLM
Signed-off-by: Michael Auer <mick@xxxxxxxx>
---
Tested on a OnePlus 6 with an sdm845-mainline 7.1-rc1 based kernel.
On qcom/for-next only the DTB build and dtbs_check (W=1) were run, for
all sdm845 and sdm850 boards.
On this phone CX collapse also needs the sdm845 ALC interconnect RFC,
sent separately.
arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index 844b840bc546..52059ba75893 100644
--- a/arch/arm64/boot/dts/qcom/sdm845.dtsi
+++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi
@@ -5176,7 +5176,7 @@ spmi_bus: spmi@c440000 {
<0 0x0c40a000 0 0x26000>;
reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
interrupt-names = "periph_irq";
- interrupts = <GIC_SPI 481 IRQ_TYPE_LEVEL_HIGH>;
+ interrupts-extended = <&pdc_intc 1 IRQ_TYPE_LEVEL_HIGH>;
qcom,ee = <0>;
qcom,channel = <0>;
#address-cells = <2>;
base-commit: d628f8fa591e8e78995afd179e6ee021135cba6c
--
2.43.0