Re: [PATCH v6 6/6] alpha: stop on fatal Tsunami system ECC and write parity errors

[Matt Turner]

> +#define TSUNAMI_PERROR_FATAL (perror_m_uecc | perror_m_perr)

Why PERR and not RDPE? Bad parity on data read from PCI seems just as
bad for the consumer. If the HRM says the Pchip poisons that data and
the CPU takes a 670 for it, please say so in the changelog.

> +             perror = live.perror[0] | live.perror[1];

The changelog says incidental PERROR state on a CPU or environmental
vector cannot trigger the panic. It still can on a system vector: UECC
or PERR latched before an unrelated NXM will panic here. That may be
what you want, since the error is real either way, but the changelog
should cover it. It also depends on the PERRMASK question I asked on
patch 4.

Two things that I think belong in the changelog:

A CPU-detected uncorrectable ECC error (670 through
ev6_machine_check()) still does not panic, so after this patch the
policy differs by who detected the error.

A PCI card with a marginal connection that asserts PERR# now takes the
machine down, where before it logged and carried on.