Re: [PATCH net-next 0/5] net: mdio: add timestamped MDIO writes for PHY gettimex64

[Nicolai Buchwitz]

Hi Andrew

On 11.10.2026 15:50, Andrew Lunn wrote:
> > For example, using PTP_SYS_OFFSET_EXTENDED on the Raspberry Pi CM5 to
> > synchronize the system clock from the BCM54210PE PHY PHC leads to the
> > system clock being 32 µs ahead of the PHC. On the CM4, it is about 7 
> > µs.
> > (The difference is because the MDIO clock frequency is higher on the
> > CM4: 10 MHz as opposed to 2.08 MHz on the CM5.)
>
> IEEE 802.3 says the clock should be 2.5Mhz. Does the CM4 use a
> clock-frequency DT property to enable this faster clock?
>
> 	Andrew

The Pi 400 is the only BCM2711 board with clock-frequency in DT
(1950000, from a downstream "Limit MDIO clock speed" commit with no
further explanation). There the driver's assumed 250 MHz reference
gives divider 63, which with the real 200 MHz (see my comments on
patch 5) is about 1.56 MHz.

Pi 4 and CM4 (the one with the PTP PHY) have no clock-frequency, so
the driver keeps the firmware's divider 9, and 200 MHz / 20 is the
10 MHz James mentions.

Regards Nicolai