Re: [PATCH v14 05/16] cxl: Introduce reusable HDM decoder settings
From: Srirangan Madhavan
Date: Sat Oct 10 2026 - 22:48:16 EST
On 10/8/26 8:19 AM, Dave Jiang wrote:
That looks good to me, I was thinking that the struct cxl_decoder_settings was also needed to cache HDM decoders registers of switch USPs during PCI enumeration, but I realize that this patchset is only for type2 device reset support, not need to consider switch ports reset.You are correct. I guess we cross that bridge when we get there?
Seems like if a switch USP reset will destroy the HDM routing in type2 device under switch case, if we want to support it, we will need another patchset to cache decoders registers on switch USP?
DJ
Ack. I've adopted Dave's refactor in v15. It now follows Dave's endpoint-settings split.
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Regards,
Srirangan