Re: [PATCH v2 01/14] ASoC: mediatek: mt8195: Fix tuner clock error handling

[Ajay Kumar Nandam]

On 10/5/2026 4:32 PM, phucduc.bui@xxxxxxxxx wrote:
> From: bui duc phuc <phucduc.bui@xxxxxxxxx>
>
> Check and propagate errors from mt8195_afe_enable_clk(). If enabling
> the tuner clock fails, disable the previously enabled APLL clock.
>
> Fixes: ff5a90173d98 ("ASoC: mediatek: mt8195: enable apll tuner")
> Signed-off-by: bui duc phuc <phucduc.bui@xxxxxxxxx>
> ---
>   sound/soc/mediatek/mt8195/mt8195-afe-clk.c | 24 +++++++++++++++++-----
>   1 file changed, 19 insertions(+), 5 deletions(-)
>
> diff --git a/sound/soc/mediatek/mt8195/mt8195-afe-clk.c b/sound/soc/mediatek/mt8195/mt8195-afe-clk.c
> index 618d8400913a..ec1ea5b988ff 100644
> --- a/sound/soc/mediatek/mt8195/mt8195-afe-clk.c
> +++ b/sound/soc/mediatek/mt8195/mt8195-afe-clk.c
> @@ -241,21 +241,35 @@ static int mt8195_afe_enable_tuner_clk(struct mtk_base_afe *afe,
>   				       unsigned int id)
>   {
>   	struct mt8195_afe_private *afe_priv = afe->platform_priv;
> +	int ret;
>   
>   	switch (id) {
>   	case MT8195_AUD_PLL1:
> -		mt8195_afe_enable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL]);
> -		mt8195_afe_enable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL1_TUNER]);
> +		ret = mt8195_afe_enable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL]);
> +		if (ret)
> +			return ret;
> +		ret = mt8195_afe_enable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL1_TUNER]);
> +		if (ret) {
> +			mt8195_afe_disable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL]);
> +			return ret;
> +		}
>   		break;
>   	case MT8195_AUD_PLL2:
> -		mt8195_afe_enable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL2]);
> -		mt8195_afe_enable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL2_TUNER]);
> +		ret = mt8195_afe_enable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL2]);
> +		if (ret)
> +			return ret;
> +		ret = mt8195_afe_enable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL2_TUNER]);
> +		if (ret) {
> +			mt8195_afe_disable_clk(afe, afe_priv->clk[MT8195_CLK_AUD_APLL2]);
> +			return ret;
> +		}
>   		break;
>   	default:
> +		ret = 0;
>   		break;
>   	}
>   
> -	return 0;
> +	return ret;
>   }

This makes mt8195_afe_enable_tuner_clk() return the clock enable 
failure, but after applying the series I think the error is still 
dropped by the next caller.

mt8195_afe_enable_apll_tuner() now returns the error from this helper, 
but mt8195_afe_enable_main_clock() still calls it for APLL1 and APLL2 
without checking either return value. mt8195_afe_runtime_resume() does 
check the return from mt8195_afe_enable_main_clock(), so checking the 
tuner calls there would let the failure reach the existing resume unwind 
path.

Should mt8195_afe_enable_main_clock() also check these return values, 
and unwind APLL1 if enabling the APLL2 tuner fails?

Thanks
Ajay Kumar Nandam

>   
>   static int mt8195_afe_disable_tuner_clk(struct mtk_base_afe *afe,