Re: [PATCH 10/11] PCI: tegra194: Fix Endpoint MSI/MSI-X numbering

[Niklas Cassel]

On Wed, Sep 23, 2026 at 12:52:36PM +0530, Manikanta Maddireddy wrote:
> pci_epc_raise_irq() passes MSI and MSI-X interrupt numbers in the
> 1-N range. The Tegra MSI path rejected values above 32 but accepted
> zero, which makes BIT(irq - 1) shift by a negative amount.
> 
> The Tegra MSI-X path also wrote that 1-based number to the DWC MSI-X
> doorbell. The doorbell expects a zero-based vector index, matching the
> common DesignWare doorbell helper which programs interrupt_num - 1.
> 
> Reject zero for both MSI and MSI-X, read the MSI-X table size directly
> from the DWC capability, and write irq - 1 to the MSI-X doorbell.
> 
> Also advertise MSI-X support in the Tegra Endpoint features so endpoint
> functions can expose and exercise the Tegra MSI-X path.
> 
> Fixes: c57247f940e8 ("PCI: tegra: Add support for PCIe endpoint mode in Tegra194")
> Signed-off-by: Manikanta Maddireddy <mmaddireddy@xxxxxxxxxx>
> ---
>  drivers/pci/controller/dwc/pcie-tegra194.c | 25 ++++++++++++++++++----
>  1 file changed, 21 insertions(+), 4 deletions(-)


Subject: PCI: tegra194: Fix Endpoint MSI/MSI-X numbering

Makes it look like the MSI numbering was wrong. It wasn't.

Don't get me wrong, I think this change makes sense:

> @@ -2026,7 +2026,7 @@ static int tegra_pcie_ep_raise_intx_irq(struct tegra_pcie_dw *pcie, u16 irq)
>  
>  static int tegra_pcie_ep_raise_msi_irq(struct tegra_pcie_dw *pcie, u16 irq)
>  {
> -	if (unlikely(irq > 32))
> +	if (unlikely(!irq || irq > 32))
>  		return -EINVAL;
>  
>  	appl_writel(pcie, BIT(irq - 1), APPL_MSI_CTRL_1);

But that change should be in a separate commit IMO, as does not not actually
fix any existing problem. All EPF drivers follow the pci_epc_raise_irq() kdoc,
and currently call pci_epc_raise_irq() with a value in (1-N).



That way the commit message for fixing tegra_pcie_ep_raise_msix_irq() is
also clearer, as you would not be talking about two separate paths in the
same commit.


Kind regards,
Niklas