Re: [PATCH v7 04/10] ASoC: qcom: Add QAIF CPU DAI ops, regmap, DT parsing and platform init
From: Mark Brown
Date: Wed Sep 23 2026 - 05:55:58 EST
On Wed, Sep 23, 2026 at 12:18:24PM +0530, Harendra Gautam wrote:
> Add the QAIF CPU DAI driver to support Qualcomm audio interface paths
> used for CDC DMA and serial AIF audio links.
> +static int qaif_aif_cpu_daiops_hw_params(struct snd_pcm_substream *substream,
> + struct snd_pcm_hw_params *params,
> + struct snd_soc_dai *dai)
> +{
> + /*
> + * The sync, lane and frame configuration and the MI2S bit clock are
> + * shared by both directions of an AIF. Concurrent playback and
> + * capture on the same interface are therefore expected to use a
> + * compatible format, rate and slot configuration.
> + */
What enforces this?
> +static int of_qaif_parse_aif_intf_cfg(struct device *dev,
> + struct qaif_drv_data *data)
> +{
> + switch (snd_soc_daifmt_parse_format(intf_np, NULL) &
> + SND_SOC_DAIFMT_FORMAT_MASK) {
> + case SND_SOC_DAIFMT_I2S:
> + cfg->sync_mode = QAIF_AIF_SYNC_MODE_LONG;
> + cfg->sync_delay = QAIF_AIF_SYNC_DELAY_ONE;
> + cfg->invert_sync = true;
> + break;
Does this line up with the clock inversion in set_fmt()?
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