Re: [PATCH v11 5/9] media: iris: Handle CPU_CS_SCIACMDARG3 register write via program bootup registers hook

From: Vikash Garodia

Date: Tue Sep 22 2026 - 14:11:36 EST



On 9/17/2026 10:30 AM, Vishnu Reddy wrote:
On the Glymur platform, the firmware reads CPU_CS_SCIACMDARG3 during boot
to determine the VM count and increments it by 1. Writing the default 0x1
causes the firmware to treat the VM count as 2. To avoid that write 0x0 to
CPU_CS_SCIACMDARG3 as a Glymur platform specific.

Reviewed-by: Dmitry Baryshkov<dmitry.baryshkov@xxxxxxxxxxxxxxxx>
Signed-off-by: Vishnu Reddy<busanna.reddy@xxxxxxxxxxxxxxxx>
---
drivers/media/platform/qcom/iris/iris_vpu3x.c | 6 ++++++
drivers/media/platform/qcom/iris/iris_vpu_common.c | 4 ++--
drivers/media/platform/qcom/iris/iris_vpu_register_defines.h | 1 +
3 files changed, 9 insertions(+), 2 deletions(-)

Reviewed-by: Vikash Garodia <vikash.garodia@xxxxxxxxxxxxxxxx>