Re: R: [PATCH net] net: dsa: mv88e6xxx: continue without PTP if the TAI period is invalid

[Andrew Lunn]

On Sun, Sep 20, 2026 at 05:34:01PM +0000, Nicolò Giuliani - nicolo.giuliani6@xxxxxxxxxxxxxxx wrote:
> 
> Hi Andrew,
> 
> > The point of the failure is to indicate an assumption in the driver is
> > not valid, and we need to examine the assumption.
> 
> You are right, and my patch only works around it.
> 
> > What does the datasheet for the 88E6193X say about this register? Has
> > its meaning changed? Marvell like moving registers around, is it
> > somewhere else?
> 
> I do not have the datasheet for this chip, so I cannot answer that from documentation.

I don't have the 88E6193X either. But i do have some other datasheets.

If the device is using the internal 250MHz clock, the register is
expected to contain 0x0FA0, 4000picoseconds. If i remember correctly,
the patch which changed things was because different devices have
different internal clocks, hence the need to read it.

There is however the option to use an external clock. This is
controlled via TAI register 0x1e. If bit 14 is 0, the internal clock
is used. If 1, the external clock is used. With the external clock,
you need to write to register 0x01 what the external clock period is,
in picoseconds.

So you probably want to check what register 0x1e contains.

	Andrew