Re: [PATCH 2/4] dt-bindings: clock: introduce toshiba,tc9564-clock.yaml

[Krzysztof Kozlowski]

On Fri, Sep 18, 2026 at 11:52:31AM -0500, Alex Elder wrote:
> +description: |
> +  The Toshiba TC9564 is an SoC accessed by a host system through the
> +  upstream PCIe port on the PCIe switch it implements.  The switch
> +  includes an embedded PCIe endpoint that provides access to various
> +  SoC peripherals (including a clock/reset controller) via its BARs.
> +
> +  The SoC is represented using a devicetree PCI endpoint bus, so the
> +  clock controller is bound to its driver using a platform driver

Do not mention drivers here. Just say that host can access clocks etc
via PCI.

But then more questions. This is PCI, yes? So how are the clocks from
PCI routed BACK to the main soc, which would justify having this in DTS
in the first place?


> +  compatible string.  All of the clocks are simple gate clocks.
> +
> +  A total of 21 clocks are implemented, though two of these are not
> +  controllable.  Access to the clock controller relies on PCIe being
> +  functional, so the PCIe clock is assumed to be always on.  Similarly,
> +  the PCIe controller relies on I2C, so the I2C clock is also assumed
> +  to be always on.
> +
> +  In addition, 13 resets are implemented.  Similar to clocks, the PCIe
> +  and I2C resets are assumed to be deasserted and cannot be controlled.
> +
> +  Clock and reset ids are defined in <dt-bindings/clock/toshiba,tc9564.h>.
> +
> +properties:
> +  compatible:
> +    const: toshiba,tc9564-clock
> +
> +  reg:
> +    maxItems: 1
> +
> +  "#clock-cells":
> +    const: 1
> +
> +  "#reset-cells":
> +    const: 1
> +
> +required:
> +  - compatible
> +  - reg
> +  - "#clock-cells"
> +  - "#reset-cells"
> +
> +unevaluatedProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/clock/toshiba,tc9564.h>
> +
> +    clock@1004 {
> +        compatible = "toshiba,tc9564-clock";
> +        reg = <0x1004 0x20>;
> +        #clock-cells = <1>;
> +        #reset-cells = <1>;

No resources except small address space, so does not look like a
separate device and should be folded into the parent node.

> +    };
> diff --git a/MAINTAINERS b/MAINTAINERS
> index b2d3257b8f892..66d0e7e65adcb 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -27670,6 +27670,13 @@ F:	Documentation/devicetree/bindings/media/i2c/toshiba,tc358743.txt
>  F:	drivers/media/i2c/tc358743*
>  F:	include/media/i2c/tc358743.h
>  
> +TOSHIBA TC9564 CLOCK DRIVER
> +M:	Alex Elder <elder@xxxxxxxxxx>
> +M:	Daniel Thompson <danielt@xxxxxxxxxx>
> +S:	Maintained
> +F:	Documentation/devicetree/bindings/clock/toshiba,tc9564-clock.yaml
> +F:	include/dt-bindings/clock/toshiba,tc9564.h
> +
>  TOSHIBA TC9564 PCI DRIVER
>  M:	Alex Elder <elder@xxxxxxxxxx>
>  M:	Daniel Thompson <danielt@xxxxxxxxxx>
> diff --git a/include/dt-bindings/clock/toshiba,tc9564.h b/include/dt-bindings/clock/toshiba,tc9564.h
> new file mode 100644
> index 0000000000000..75732fddd3025
> --- /dev/null
> +++ b/include/dt-bindings/clock/toshiba,tc9564.h
> @@ -0,0 +1,54 @@
> +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
> +
> +/*
> + * Copyright (C) 2026 by RISCstar Solutions Corporation.  All rights reserved.
> + */
> +
> +#ifndef __ClOCK_TOSHIBA_TC9564_H__
> +#define __ClOCK_TOSHIBA_TC9564_H__
> +
> +/* Clock IDs */
> +
> +#define CLOCK_MCU		0
> +#define CLOCK_INTC		1
> +/* #define CLOCK_PCIE		2 */
> +/* #define CLOCK_I2C		3 */

Drop both, and SRAM is number 2. Or enable and implement them.

Best regards,
Krzysztof