Re: [PATCHv2 net] net: phy: marvell: undo WoL setup when Wake-on-LAN is disabled

[Rosen Penev]

On Sat, Sep 19, 2026 at 3:41 PM Jakub Kicinski <kuba@xxxxxxxxxx> wrote:
>
> On Mon, 14 Sep 2026 14:24:09 -0700 Rosen Penev wrote:
> > Fully disabling Wake-on-LAN on the 88E1318S/88E1510 used to leave
> > the WoL interrupt enable bit (CSIER.WOL_EIE) set and LED[2]
> > configured as the INTn pin. A magic packet arriving after "wol d"
> > would still assert INTn, and a later "wol g" re-enabled WoL from a
> > dirty register state.
> >
> > Fully disabling WoL clears CSIER.WOL_EIE on the copper page. The
> > LED[2]/INTn pin mux is disposed of only when this driver forced it to
> > the INTn function: the INTn enable and polarity bits read at arming
> > time are saved, and restored once all WoL options are cleared, so PHYs
> > serving the MAC interrupt, strap configs, or marvell,reg-init values
> > are never touched. The FORCE_INT bit is not set while disposing of the
> > pin: it holds the interrupt line asserted and turns the shared PHY
> > interrupt into a "nobody cared" IRQ storm when the PHY interrupt is in
> > use.
>
> Oof, this is pretty hard to read. The paragraph is pretty much 2
> run-on sentences.
I'll get it to rewrite.
>
> Please add info about how the issue was discovered and how it was
> tested. If you don't have HW back to net-next without Fixes it goes.
> The AI is pretty bad at judging severity, I need to find time to tune
> the Fixes suggestions further :/
Probably. I don't know much about the specifics of Sashiko.

This patch was split from a larger one that adds support for WoL on an
mvebu device. LLM suggested the v1 of this as a bug fix. I did not.
But then sashiko did.

The full thing, which unfortunately needs patching of the PHY and GPIO
drivers, along with dts, was tested on a Helios 4. This alone does not
add support for anything but does prevent the IRQ storm as mentioned
in the description.
> --
> pw-bot: cr