[PATCH v7 3/3] arm64: dts: rockchip: Add devicetree for the FriendlyElec NanoPi R28S

From: 安容 via B4 Relay

Date: Sat Sep 19 2026 - 06:28:56 EST


From: 安容 <HystericalDragons@xxxxxxxxx>

The NanoPi R28S is a dual gigabit Ethernet router board based on the
Rockchip RK3528 SoC, designed and developed by FriendlyElec. It shares
most of its design with the NanoPi Zero2, so it builds on the common
rk3528-nanopi.dtsi.

Specification:
- Rockchip RK3528
- 1GB RAM
- eMMC socket (optional)
- MicroSD slot
- 1x 1000Base-T (GMAC1, Realtek RTL8211F)
- 1x 1000Base-T (PCIe, Realtek RTL8111H)
- AICSemi AIC8800D80 SDIO WiFi + Bluetooth
- 3x LEDs (SYS, LAN, WAN)
- 1x USB 2.0 Type-C OTG, shared with the 5V power input
- User and MaskROM buttons
- Haoyu HYM8563 RTC
- 1x USB Type-C debug UART (onboard WCH CH340E)

The AIC8800D80 has no upstream driver yet, so only the SDIO and UART
controllers it hangs off are enabled, along with the WiFi and Bluetooth
wake and power pins taken from the schematics.

Assisted-by: LLM
Signed-off-by: 安容 <HystericalDragons@xxxxxxxxx>
---
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../arm64/boot/dts/rockchip/rk3528-nanopi-r28s.dts | 160 +++++++++++++++++++++
2 files changed, 161 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile
index b677914cd3..51a9889088 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -94,6 +94,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-vicharak-vaaman.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399pro-rock-pi-n10.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-armsom-sige1.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-hinlink-h28k.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-nanopi-r28s.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-nanopi-zero2.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-radxa-e20c.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3528-rock-2a.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3528-nanopi-r28s.dts b/arch/arm64/boot/dts/rockchip/rk3528-nanopi-r28s.dts
new file mode 100644
index 0000000000..294b66f60e
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3528-nanopi-r28s.dts
@@ -0,0 +1,160 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2022 Rockchip Electronics Co., Ltd.
+ * Copyright (c) 2026 FriendlyElec Computer Tech. Co., Ltd.
+ * Copyright (c) 2026 安容 <HystericalDragons@xxxxxxxxx>
+ */
+
+/dts-v1/;
+
+#include "rk3528-nanopi.dtsi"
+
+/ {
+ model = "FriendlyElec NanoPi R28S";
+ compatible = "friendlyarm,nanopi-r28s", "rockchip,rk3528";
+
+ aliases {
+ mmc2 = &sdio0;
+ serial2 = &uart2;
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+ pinctrl-names = "default";
+ pinctrl-0 = <&gpio4_b2_usr_btn>;
+
+ button-user {
+ debounce-interval = <50>;
+ gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_LOW>;
+ label = "USER";
+ linux,code = <BTN_1>;
+ wakeup-source;
+ };
+ };
+
+ sdio_pwrseq: sdio-pwrseq {
+ compatible = "mmc-pwrseq-simple";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pwr_wf>;
+ post-power-on-delay-ms = <100>;
+ reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&combphy {
+ status = "okay";
+};
+
+&led1 {
+ default-state = "off";
+ function = LED_FUNCTION_WAN;
+ linux,default-trigger = "netdev";
+};
+
+&leds {
+ pinctrl-names = "default";
+ pinctrl-0 = <&led_sys_pin>, <&led1_pin>, <&led2_pin>;
+
+ led-2 {
+ color = <LED_COLOR_ID_GREEN>;
+ default-state = "off";
+ function = LED_FUNCTION_LAN;
+ gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "netdev";
+ };
+};
+
+&pcie {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pcie_eth_perstb>;
+ reset-gpios = <&gpio4 RK_PC0 GPIO_ACTIVE_HIGH>;
+ vpcie3v3-supply = <&vcc_3v3>;
+ status = "okay";
+};
+
+&pinctrl {
+ bluetooth {
+ bt_wake_host: bt-wake-host {
+ rockchip,pins = <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_down>;
+ };
+
+ host_wake_bt: host-wake-bt {
+ rockchip,pins = <1 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ gpio-keys {
+ gpio4_b2_usr_btn: gpio4-b2-usr-btn {
+ rockchip,pins = <4 RK_PB2 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ leds {
+ led2_pin: led2-pin {
+ rockchip,pins = <4 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ pcie {
+ pcie_eth_perstb: pcie-eth-perstb {
+ rockchip,pins = <4 RK_PC0 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ wifi {
+ host_wake_wl: host-wake-wl {
+ rockchip,pins = <1 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ pwr_wf: pwr-wf {
+ rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+
+ wl_wake_host: wl-wake-host {
+ rockchip,pins = <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_down>;
+ };
+ };
+};
+
+&sdio0 {
+ bus-width = <4>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+ keep-power-in-suspend;
+ mmc-pwrseq = <&sdio_pwrseq>;
+ no-mmc;
+ no-sd;
+ non-removable;
+ sd-uhs-sdr104;
+ vmmc-supply = <&vcc_3v3>;
+ vqmmc-supply = <&vcc_1v8>;
+ status = "okay";
+};
+
+&uart2 {
+ dma-names = "tx", "rx";
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart2m1_xfer>, <&uart2m1_ctsn>, <&uart2m1_rtsn>;
+ uart-has-rtscts;
+ status = "okay";
+};
+
+&usb_host0_xhci {
+ /*
+ * The Type-C port is also the 5V power input, so it comes up as a
+ * device, but host mode works with an externally powered hub.
+ */
+ extcon = <&usb2phy>;
+ maximum-speed = "high-speed";
+ phys = <&usb2phy_otg>;
+ phy-names = "usb2-phy";
+ status = "okay";
+};
+
+&usb2phy {
+ status = "okay";
+};
+
+&usb2phy_otg {
+ status = "okay";
+};

--
2.55.0