Re: [PATCH 2/4] spi: sg2044-nor: Honor SPI clock limits
From: Mark Brown
Date: Thu Sep 17 2026 - 16:38:25 EST
On Thu, Sep 17, 2026 at 10:29:20PM +0800, Han Gao wrote:
> The fixed divider ignores device and operation clock limits. Calculate
> the divider before each transfer so SCK does not exceed either limit.
> +static int sg2044_spifmc_set_speed(struct sg2044_spifmc *spifmc,
> + unsigned int speed_hz)
> +{
> + unsigned long rate = clk_get_rate(spifmc->clk);
> + u64 div;
> + u32 reg;
> +
> + if (!rate || !speed_hz)
> + return -EINVAL;
Specifying a maximum speed is optional so we might have a currently
working setup with one omitted. The driver should just go with the
maximum speed it supports in that case.
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