Re: [PATCH v5 01/16] x86/cpufeatures: Support Privilege Level Zero Association (PLZA)

[Reinette Chatre]

Hi Babu,

On 9/16/26 1:45 PM, Babu Moger wrote:
> On 9/16/26 00:12, Reinette Chatre wrote:
>> On 8/26/26 12:32 PM, Babu Moger wrote:


...

> 
>>
>>>
>>> PLZA also applies to cache allocation and monitoring features and provides
>>> flexibility to manage allocation and monitoring associations independently.
>>
>> This reads like an afterthought. Are users expected to use cache allocation
>> while PLZA is enabled? Since only one resource group can be assigned I expect
>> there to be quite a few sharp corners when both are in use. Kernel work done
>> on behalf of high as well as low priority work will use the same cache allocations
>> and thus neither could actually get full benefit from having dedicated cache
>> portions?
> 
> The best-known use case today is to leave both cache allocation and
> memory bandwidth allocation at their default (maximum) settings and
> enable PLZA on all CPUs.

Interesting. This sounds like all kernel work can access the entire cache
and thus evict data from any user space tasks that may have used cache allocation
to avoid interference.

> 
> Users can, however, configure both cache allocation and memory bandwidth limits. In those cases, there can be corner-case behaviors and trade-offs.
> 
> If you think the current wording is misleading, I can drop that text and rephrase it along these lines to include both cache and memory.

No, the wording is not misleading. The description just focuses on memory bandwidth
allocation leaving impression that the feature only applies to that resource when it
applies to all resources.

> 
> "When cache and/or memory bandwidth associated with a CLOSID is
> aggressively throttled, and a task with that CLOSID moves into
> kernel mode, the kernel operations are also aggressively throttled.
> This can stall forward progress and eventually degrade overall
> system performance.
> 
> AMD hardware supports the Privilege Level Zero Association (PLZA)
> feature, which allows the CPU's CLOSID and/or RMID association to be
> changed during transitions from user mode to kernel mode. This
> enables the kernel to run with a different CLOSID and/or RMID than
> user space, improving system performance and/or allowing kernel work
> to be monitored separately."> 

I think what you have for memory bandwidth sounds good. I do not think
the cache allocation and memory bandwidth usage descriptions should be
mixed since the implications are so different. Could you please just
add a snippet that highlights since the feature assigns CLOSID/RMID to
kernel work it influences allocation and monitoring of all resources,
not just memory bandwidth?

Reinette