[PATCH v2 11/15] arm64: dts: qcom: talos: Move PCIe phy and GPIOs to root port node

From: Krishna Chaitanya Chundru

Date: Thu Sep 17 2026 - 08:36:15 EST


The PCIe phy reference and the perst/wake GPIO properties are
per root port and belong in the root port node (pcie@0), not in the
RC controller node. Move phys from the controller to pcie_port0, and
move perst-gpios/wake-gpios from the &pcie controller overrides to the
&pcie_port0 node in the board files, renaming perst-gpios to reset-gpios
to match the binding used in the root port context.

Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@xxxxxxxxxxxxxxxx>
---
arch/arm64/boot/dts/qcom/qcs615-ride.dts | 5 ++---
arch/arm64/boot/dts/qcom/talos-evk-som.dtsi | 5 ++---
arch/arm64/boot/dts/qcom/talos.dtsi | 8 ++++----
3 files changed, 8 insertions(+), 10 deletions(-)

diff --git a/arch/arm64/boot/dts/qcom/qcs615-ride.dts b/arch/arm64/boot/dts/qcom/qcs615-ride.dts
index 43f110ba3a7c..142dafb04324 100644
--- a/arch/arm64/boot/dts/qcom/qcs615-ride.dts
+++ b/arch/arm64/boot/dts/qcom/qcs615-ride.dts
@@ -444,9 +444,6 @@ &mdss_dsi0_phy {
};

&pcie {
- perst-gpios = <&tlmm 101 GPIO_ACTIVE_LOW>;
- wake-gpios = <&tlmm 100 GPIO_ACTIVE_LOW>;
-
pinctrl-0 = <&pcie_default_state>;
pinctrl-names = "default";

@@ -461,6 +458,8 @@ &pcie_phy {
};

&pcie_port0 {
+ reset-gpios = <&tlmm 101 GPIO_ACTIVE_LOW>;
+ wake-gpios = <&tlmm 100 GPIO_ACTIVE_LOW>;
wifi@0 {
compatible = "pci17cb,1103";
reg = <0x10000 0x0 0x0 0x0 0x0>;
diff --git a/arch/arm64/boot/dts/qcom/talos-evk-som.dtsi b/arch/arm64/boot/dts/qcom/talos-evk-som.dtsi
index 198f656bddf1..aa2d9532d37f 100644
--- a/arch/arm64/boot/dts/qcom/talos-evk-som.dtsi
+++ b/arch/arm64/boot/dts/qcom/talos-evk-som.dtsi
@@ -366,9 +366,6 @@ &mdss_dsi0_phy {
};

&pcie {
- perst-gpios = <&tlmm 89 GPIO_ACTIVE_LOW>;
- wake-gpios = <&tlmm 100 GPIO_ACTIVE_LOW>;
-
pinctrl-0 = <&pcie_default_state>;
pinctrl-names = "default";

@@ -383,6 +380,8 @@ &pcie_phy {
};

&pcie_port0 {
+ reset-gpios = <&tlmm 89 GPIO_ACTIVE_LOW>;
+ wake-gpios = <&tlmm 100 GPIO_ACTIVE_LOW>;
wifi@0 {
compatible = "pci17cb,1103";
reg = <0x10000 0x0 0x0 0x0 0x0>;
diff --git a/arch/arm64/boot/dts/qcom/talos.dtsi b/arch/arm64/boot/dts/qcom/talos.dtsi
index eedfdce3c479..a22f78f5a5de 100644
--- a/arch/arm64/boot/dts/qcom/talos.dtsi
+++ b/arch/arm64/boot/dts/qcom/talos.dtsi
@@ -1367,9 +1367,6 @@ &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,

power-domains = <&gcc PCIE_0_GDSC>;

- phys = <&pcie_phy>;
- phy-names = "pciephy";
-
max-link-speed = <2>;

operating-points-v2 = <&pcie_opp_table>;
@@ -1397,10 +1394,13 @@ opp-5000000 {
pcie_port0: pcie@0 {
device_type = "pci";
reg = <0x0 0x0 0x0 0x0 0x0>;
+ bus-range = <0x01 0xff>;
+
+ phys = <&pcie_phy>;
+
#address-cells = <3>;
#size-cells = <2>;
ranges;
- bus-range = <0x01 0xff>;
};
};


--
2.34.1