linux-next: manual merge of the drm-intel tree with the drm-intel-fixes tree

[Mark Brown]

Hi all,

Today's linux-next merge of the drm-intel tree got a conflict in:

  drivers/gpu/drm/i915/display/intel_cursor.c
  drivers/gpu/drm/i915/display/skl_universal_plane.c

between commit:

  a26204be587c5 ("Revert "drm/i915/display: Clear SEL_FETCH_PLANE_CTL on plane disable"")

from the drm-intel-fixes tree and commits:

  d393529394167 ("Revert "drm/i915/display: Clear SEL_FETCH_PLANE_CTL on plane disable"")
  a4c0e7f80429e ("drm/i915/psr: Clear stale sel fetch enable bits on sel fetch disable")

from the drm-intel tree.

I fixed it up (see below) and can carry the fix as necessary. This
is now fixed as far as linux-next is concerned, but any non trivial
conflicts should be mentioned to your upstream maintainer when your tree
is submitted for merging.  You may also want to consider cooperating
with the maintainer of the conflicting tree to minimise any particularly
complex conflicts.

diff --combined drivers/gpu/drm/i915/display/intel_cursor.c
index 90173040d8253,4afd275de86ea..0000000000000
--- a/drivers/gpu/drm/i915/display/intel_cursor.c
+++ b/drivers/gpu/drm/i915/display/intel_cursor.c
@@@ -537,7 -537,8 +537,8 @@@ static void i9xx_cursor_disable_sel_fet
  	struct intel_display *display = to_intel_display(plane);
  	enum pipe pipe = plane->pipe;
  
- 	if (!crtc_state->enable_psr2_sel_fetch)
+ 	if (!crtc_state->enable_psr2_sel_fetch &&
+ 	    !crtc_state->clear_psr2_sel_fetch)
  		return;
  
  	intel_de_write_dsb(display, dsb, SEL_FETCH_CUR_CTL(pipe), 0);
@@@ -570,8 -571,10 +571,10 @@@ static void i9xx_cursor_update_sel_fetc
  	struct intel_display *display = to_intel_display(plane);
  	enum pipe pipe = plane->pipe;
  
- 	if (!crtc_state->enable_psr2_sel_fetch)
+ 	if (!crtc_state->enable_psr2_sel_fetch) {
+ 		i9xx_cursor_disable_sel_fetch_arm(dsb, plane, crtc_state);
  		return;
+ 	}
  
  	if (drm_rect_height(&plane_state->psr2_sel_fetch_area) > 0) {
  		if (crtc_state->enable_psr2_su_region_et) {

diff --combined drivers/gpu/drm/i915/display/skl_universal_plane.c
index 07a6832933521,2636eba2ba465..0000000000000
--- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
+++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
@@@ -885,7 -885,8 +885,8 @@@ static void icl_plane_disable_sel_fetch
  	struct intel_display *display = to_intel_display(plane);
  	enum pipe pipe = plane->pipe;
  
- 	if (!crtc_state->enable_psr2_sel_fetch)
+ 	if (!crtc_state->enable_psr2_sel_fetch &&
+ 	    !crtc_state->clear_psr2_sel_fetch)
  		return;
  
  	intel_de_write_dsb(display, dsb, SEL_FETCH_PLANE_CTL(pipe, plane->id), 0);
@@@ -1240,36 -1241,46 +1241,46 @@@ static u32 glk_plane_color_ctl_crtc(con
  	return plane_color_ctl;
  }
  
- static u32 glk_plane_color_ctl(const struct intel_plane_state *plane_state)
+ static u32 glk_plane_color_ctl_input_csc(const struct intel_plane_state *plane_state)
  {
  	struct intel_display *display = to_intel_display(plane_state);
  	const struct drm_framebuffer *fb = plane_state->hw.fb;
  	struct intel_plane *plane = to_intel_plane(plane_state->uapi.plane);
+ 	bool color_pipeline = !!plane_state->uapi.color_pipeline;
+ 	bool needs_csc = color_pipeline ? plane_state->hw.csc_ff_enable : fb->format->is_yuv;
+ 	u32 ctl = 0;
+ 
+ 	if (!needs_csc)
+ 		return 0;
+ 
+ 	if (!icl_is_hdr_plane(display, plane->id)) {
+ 		switch (plane_state->hw.color_encoding) {
+ 		case DRM_COLOR_YCBCR_BT709:
+ 			ctl |= PLANE_COLOR_CSC_MODE_YUV709_TO_RGB709;
+ 			break;
+ 		case DRM_COLOR_YCBCR_BT2020:
+ 			ctl |= PLANE_COLOR_CSC_MODE_YUV2020_TO_RGB2020;
+ 			break;
+ 		default:
+ 			ctl |= PLANE_COLOR_CSC_MODE_YUV601_TO_RGB601;
+ 		}
+ 	} else {
+ 		ctl |= PLANE_COLOR_INPUT_CSC_ENABLE;
+ 	}
+ 
+ 	if (plane_state->hw.color_range == DRM_COLOR_YCBCR_FULL_RANGE)
+ 		ctl |= PLANE_COLOR_YUV_RANGE_CORRECTION_DISABLE;
+ 
+ 	return ctl;
+ }
+ 
+ static u32 glk_plane_color_ctl(const struct intel_plane_state *plane_state)
+ {
  	u32 plane_color_ctl = 0;
  
  	plane_color_ctl |= PLANE_COLOR_PLANE_GAMMA_DISABLE;
  	plane_color_ctl |= glk_plane_color_ctl_alpha(plane_state);
- 
- 	if (fb->format->is_yuv && !icl_is_hdr_plane(display, plane->id)) {
- 		switch (plane_state->hw.color_encoding) {
- 		case DRM_COLOR_YCBCR_BT709:
- 			plane_color_ctl |= PLANE_COLOR_CSC_MODE_YUV709_TO_RGB709;
- 			break;
- 		case DRM_COLOR_YCBCR_BT2020:
- 			plane_color_ctl |=
- 				PLANE_COLOR_CSC_MODE_YUV2020_TO_RGB2020;
- 			break;
- 		default:
- 			plane_color_ctl |=
- 				PLANE_COLOR_CSC_MODE_YUV601_TO_RGB601;
- 		}
- 		if (plane_state->hw.color_range == DRM_COLOR_YCBCR_FULL_RANGE)
- 			plane_color_ctl |= PLANE_COLOR_YUV_RANGE_CORRECTION_DISABLE;
- 	} else if (fb->format->is_yuv) {
- 		plane_color_ctl |= PLANE_COLOR_INPUT_CSC_ENABLE;
- 		if (plane_state->hw.color_range == DRM_COLOR_YCBCR_FULL_RANGE)
- 			plane_color_ctl |= PLANE_COLOR_YUV_RANGE_CORRECTION_DISABLE;
- 	}
+ 	plane_color_ctl |= glk_plane_color_ctl_input_csc(plane_state);
  
  	if (plane_state->force_black)
  		plane_color_ctl |= PLANE_COLOR_PLANE_CSC_ENABLE;
@@@ -1611,7 -1622,8 +1622,8 @@@ icl_plane_update_noarm(struct intel_ds
  	intel_de_write_dsb(display, dsb, PLANE_COLOR_CTL(pipe, plane_id),
  			   plane_color_ctl);
  
- 	if (fb->format->is_yuv && icl_is_hdr_plane(display, plane_id))
+ 	if (icl_is_hdr_plane(display, plane_id) &&
+ 	    (fb->format->is_yuv || plane_state->hw.csc_ff_enable))
  		icl_program_input_csc(dsb, plane, plane_state);
  
  	skl_write_plane_wm(dsb, plane, crtc_state);
@@@ -1634,10 -1646,8 +1646,8 @@@ static void icl_plane_update_sel_fetch_
  	struct intel_display *display = to_intel_display(plane);
  	enum pipe pipe = plane->pipe;
  
- 	if (!crtc_state->enable_psr2_sel_fetch)
- 		return;
- 
- 	if (drm_rect_height(&plane_state->psr2_sel_fetch_area) > 0)
+ 	if (crtc_state->enable_psr2_sel_fetch &&
+ 	    drm_rect_height(&plane_state->psr2_sel_fetch_area) > 0)
  		intel_de_write_dsb(display, dsb, SEL_FETCH_PLANE_CTL(pipe, plane->id),
  				   SEL_FETCH_PLANE_CTL_ENABLE);
  	else

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