[PATCH 2/5] thermal: renesas: rzg3e: Fix runtime PM handling of compare irq

From: Ovidiu Panait

Date: Wed Sep 16 2026 - 08:11:06 EST


The TSU hw is limited in the sense that lower and upper trip points can be
set, but the hw cannot raise interrupts on its own. It can only signal that
the thresholds were passed when the temperature is read, either during
polling or on a manual read. Therefore, the interrupt enable state
configured by set_trips() must remain active for the next read to trigger
an event.

Currently, runtime PM autosuspend puts the chip to sleep and clears the
compare interrupt that was enabled during set_trips(). On power up, the
compare interrupt enable is not restored, which means that it won't ever
fire.

Fix this by caching the contents of the SIER register during runtime power
off and restore it during runtime power on.

Fixes: dc67521c20b7 ("thermal/drivers/renesas/rzg3e: Fix add thermal driver for the Renesas RZ/G3E SoC")
Signed-off-by: Ovidiu Panait <ovidiu.panait.rb@xxxxxxxxxxx>
---
drivers/thermal/renesas/rzg3e_thermal.c | 8 +++++++-
1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/drivers/thermal/renesas/rzg3e_thermal.c b/drivers/thermal/renesas/rzg3e_thermal.c
index 4acee4eaff05..45f67b2e1131 100644
--- a/drivers/thermal/renesas/rzg3e_thermal.c
+++ b/drivers/thermal/renesas/rzg3e_thermal.c
@@ -93,6 +93,7 @@ struct rzg3e_thermal_info {
* @info: chip type specific information
* @trmval0: calibration value 0 (b)
* @trmval1: calibration value 1 (c)
+ * @sier: cached interrupt enable register
* @lock: protects hardware access during conversions
*/
struct rzg3e_thermal_priv {
@@ -103,6 +104,7 @@ struct rzg3e_thermal_priv {
const struct rzg3e_thermal_info *info;
u16 trmval0;
u16 trmval1;
+ u32 sier;
struct mutex lock;
};

@@ -148,12 +150,16 @@ static int rzg3e_thermal_power_on(struct rzg3e_thermal_priv *priv)
return ret;
}

+ /* Restore interrupt enable state */
+ writel(priv->sier, priv->base + TSU_SIER);
+
return 0;
}

static void rzg3e_thermal_power_off(struct rzg3e_thermal_priv *priv)
{
- /* Disable all interrupts */
+ /* Save and disable all interrupts */
+ priv->sier = readl(priv->base + TSU_SIER);
writel(0, priv->base + TSU_SIER);

/* Clear pending interrupts */
--
2.34.1