Re: [PATCH v2 1/1] arm64: dts: ti: k3-j784s4-j742s2-evm-common: Set ACSPCIe refclk to MAIN_PLL2_HSDIV4 for pcie1

[Nishanth Menon]

Hi Jared McArthur,

On Tue, 08 Sep 2026 13:59:03 -0500, Jared McArthur wrote:
> Commit e3dfcf482d07 ("arm64: dts: ti: k3-j784s4-j742s2-evm-common:
> Enable ACSPCIE0 output for PCIe1") enabled the ACSPCIE0 buffers
> to provide the PCIe refclk for PCIe1, but introduced a bug
> where the clock is remporarily disabled during initialization.
> The ACSPCIe reference clock is muxable between multiple
> sources: SERDESx_REF_DER_OUT_CLK, MAIN_PLL2_HSDIV4_CLKOUT, and
> SERDESx_REF_OUT_CLK [0]. On reset, the refclk is set to the
> SERDESx_REF_DER_OUT_CLK. In the J742S2 and J784S4, "the SerDes PCIe
> Reference Clock Output will be temporarily disabled when changing Data
> Rates to or from 8.0 GT/s in Derived Refclk mode" [1]. Some external PCIe
> devices cannot tolerate the reference clock being disabled and will
> therefore fail to link.
> 
> [...]

I have applied the following to branch ti-k3-dts-next on [1].
Thank you!

[1/1] arm64: dts: ti: k3-j784s4-j742s2-evm-common: Set ACSPCIe refclk to MAIN_PLL2_HSDIV4 for pcie1
      commit: 7e4b4f799bd043cb5b30176ddbe690a0fb5788bc

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent up the chain during
the next merge window (or sooner if it is a relevant bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
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[1] https://git.kernel.org/pub/scm/linux/kernel/git/ti/linux.git
-- 
Regards,
Nishanth Menon
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