Re: Re: [PATCH v2 2/6] KVM: x86: Prioritize DR7.GD #DB over #GP due to illegal DR6/7 value

[Maciej W. Rozycki]

On Fri, 5 Jun 2026, Christian Ludloff wrote:

> See https://www.sandpile.org/x86/debug.htm for
> a 22 year old writeup, which – thanks to a bunch
> of poking by Andy – finally got published. Back in
> the old days, #DB implementations... well, let me
> put it this way... they left a lot to be desired.

 Thanks for the pointer.

 FWIW of x86 architecture specimens I only used 64-bit Intel Atom CPUs 
with JTAG debug hardware and the implementation seemed reasonable enough.

 Debug register access emulation via DR7.GD was a must in the debug stub 
as otherwise you wouldn't get through POST to get the DRAM controller set 
up for the system to become usable without the BIOS poking at the DRx 
state and clobbering it in the course, which it was eager to do and 
intefere with the debugger state.  IIRC discarding writes and supplying 
reasonable fixed values for reads was good enough to make the BIOS happy.

 I couldn't be bothered to expose descriptor register state through the 
stub as we only cared about simple bare metal software that used a flat 
memory model.  For the same reason I have no idea if things such as traps 
on a TSS switch did anything useful.

 One could control the system via GDB otherwise right from the reset 
vector, just as with other embedded CPU architectures implementing the 
JTAG debug stuff; individual CPU cores were exposed as execution threads 
in GDB, suitably for debugging e.g. an SMP OS kernel.  I didn't get to 
running Linux under GDB in this setup though (I did with another CPU 
architecture).

  Maciej