[PATCH net-next v2 10/14] dt-bindings: net: toshiba,tc9654-dwmac: add TC9564 Ethernet bridge
From: Alex Elder
Date: Thu Jun 04 2026 - 21:14:18 EST
From: Daniel Thompson <daniel@xxxxxxxxxxxx>
Add devicetree bindings for the Toshiba TC956x family of Ethernet-AVB/TSN
bridges.
The TC9564 contains a PCIe switch with one upstream and three downstream
PCIe ports. The third PCIe downstream port has an attached embedded PCIe
endpoint, and that endpoint implements two PCIe functions. Each internal
PCIe function has a Synopsys XGMAC Ethernet interface capable of 10 Gbps
operation.
The TC9564 also implements an embedded GPIO controller, which exposes
10 lines externally. Some platforms use these GPIO lines, so this
GPIO controller is managed by a separate driver. Other embedded
peripherals (like a microcontroller, SRAM, and UART) are currently
unused.
The GPIO controller is managed by registers accessed via MMIO on an
internal PCIe function's registers.
Signed-off-by: Daniel Thompson <daniel@xxxxxxxxxxxx>
Signed-off-by: Alex Elder <elder@xxxxxxxxxxxx>
---
.../bindings/net/toshiba,tc9564-dwmac.yaml | 120 ++++++++++++++++++
MAINTAINERS | 6 +
2 files changed, 126 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/toshiba,tc9564-dwmac.yaml
diff --git a/Documentation/devicetree/bindings/net/toshiba,tc9564-dwmac.yaml b/Documentation/devicetree/bindings/net/toshiba,tc9564-dwmac.yaml
new file mode 100644
index 0000000000000..6e7a63dfcf86a
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/toshiba,tc9564-dwmac.yaml
@@ -0,0 +1,120 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/net/toshiba,tc9564-dwmac.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Toshiba TC956x Ethernet-AVB/TSN Controller
+
+maintainers:
+ - Alex Elder <elder@xxxxxxxxxxxx>
+ - Daniel Thompson <daniel@xxxxxxxxxxxx>
+
+description: |
+ The Toshiba TC9564 (and more generally, TC956x) incorporates a PCIe
+ gen 3 switch with one upstream and three downstream ports. The first
+ two downstream ports are exposed externally, while the third is used
+ by an internal PCIe endpoint. The PCIe endpoint implements two PCIe
+ functions, and attached to each of these is a 10 Gbps capable Synopsys
+ Ethernet controller.
+
+ The TC956x additionally implements other internal IP blocks, and in
+ particular it implements a GPIO controller. Ten of the 35 GPIO lines
+ implemented are exposed externally and are usable by the platform.
+ It is platform-dependent whether the GPIO function must be exposed,
+ and if it is, PCIe function 0 supplies it.
+
+ ----------------------------------
+ | Host |
+ ------+...+----------+........+---
+ |i2c| | PCIe |
+ ----------------+...+----------+........+------
+ | TC956x |I2C| |upstream| |
+ | ----- --+--------+--- |
+ | ----- ------ ------- | PCIe switch | |
+ | |SPI| |GPIO| |reset| | | |
+ | ----- ------ |clock| | DS3 DS2 DS1 | |
+ | ------- ---++--++--++-- |
+ | ----- ------ downstream// \\ \\ | downstream
+ | |MCU| |SRAM| /==========/ \\ \===== PCIe port 1
+ | ----- ------ //PCIe port 3 \\ |
+ | || \======= downstream
+ | ----+-----------++-----------+---- | PCIe port 2
+ | | M | internal PCIe endpoint | M | |
+ | | S |------------------------| S | ------ |
+ | | I | PCIe | | PCIe | I | |UART| |
+ | | G |function 0| |function 1| G | ------ |
+ | | E |----++----| |----++----| E | |
+ | | N | eMAC 0 | | eMAC 1 | N | |
+ --------+.......+------+.....+-----------------
+ |USXGMII| |SGMII|
+ --+.......+-- --+.....+--
+ | ARQ113C | | QEP8121 |
+ | PHY | | PHY |
+ ------------- -----------
+
+properties:
+ compatible:
+ enum:
+ - pci1179,0220 # Toshiba TC9564 (a.k.a. Qualcomm QPS615)
+
+ gpio:
+ type: object
+ description: Embedded GPIO controller
+ $ref: /schemas/gpio/gpio.yaml#
+
+ ethernet:
+ type: object
+ description: XGMAC Ethernet controller
+ $ref: /schemas/net/ethernet-controller.yaml#
+ properties:
+ mdio:
+ $ref: snps,dwmac.yaml#/properties/mdio
+ required:
+ - mdio
+
+required:
+ - compatible
+
+allOf:
+ - $ref: /schemas/pci/pci-device.yaml#
+ - $ref: /schemas/pci/pci-bus-common.yaml#
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ pcie {
+ #address-cells = <3>;
+ #size-cells = <2>;
+
+ pci@0,0 {
+ compatible = "pci1179,0220";
+ reg = <0x50000 0x0 0x0 0x0 0x0>;
+ #address-cells = <3>;
+ #size-cells = <2>;
+ device_type = "pci";
+ ranges;
+
+ gpio {
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ ethernet {
+ phy-mode = "10gbase-r";
+ phy-handle = <&tc9564_emac0_phy>;
+
+ mdio {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ tc9564_emac0_phy: ethernet-phy@1c {
+ compatible = "ethernet-phy-id311c.1c12";
+ reg = <0x1c>;
+ };
+ };
+ };
+ };
+ };
diff --git a/MAINTAINERS b/MAINTAINERS
index 2aa6ea012c848..f976c9fa9d9c0 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -27052,6 +27052,12 @@ F: Documentation/devicetree/bindings/media/i2c/toshiba,tc358743.txt
F: drivers/media/i2c/tc358743*
F: include/media/i2c/tc358743.h
+TOSHIBA TC956X/QUALCOMM QPS615 DWMAC ETHERNET DRIVER
+M: Alex Elder <elder@xxxxxxxxxx>
+M: Daniel Thompson <danielt@xxxxxxxxxx>
+S: Maintained
+F: Documentation/devicetree/bindings/net/toshiba,tc956x-dwmac.yaml
+
TOSHIBA WMI HOTKEYS DRIVER
M: Azael Avalos <coproscefalo@xxxxxxxxx>
L: platform-driver-x86@xxxxxxxxxxxxxxx
--
2.51.0