Re: [PATCH V2 1/8] perf/x86/intel/uncore: Fix PCI PMU cleanup on setup failure
From: Mi, Dapeng
Date: Tue Jun 02 2026 - 03:28:18 EST
On 6/2/2026 1:01 AM, Zide Chen wrote:
> When uncore_pci_pmu_register() fails, pmu->boxes[die] is set to NULL
> before returning. In the uncore_pci_remove() path, this causes
> uncore_pci_pmu_unregister() to be skipped entirely, leaking
> pmu->activeboxes. In the uncore_bus_notify() path,
> uncore_pci_pmu_unregister() may still be called and must exit early
> when pmu->boxes[die] is NULL to avoid a NULL pointer dereference, and
> to ensure activeboxes is only decremented for a previously active box.
>
> Additionally, since pci_get_drvdata() returns NULL on registration
> failure, uncore_pci_remove() can no longer treat NULL drvdata as an
> indicator of an auxiliary PCI device. Remove the associated
> WARN_ON_ONCE().
>
> Link: https://sashiko.dev/#/patchset/20260512233048.9577-1-zide.chen@xxxxxxxxx?part=1
> Signed-off-by: Zide Chen <zide.chen@xxxxxxxxx>
> ---
> V2: new patch.
> ---
> arch/x86/events/intel/uncore.c | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/arch/x86/events/intel/uncore.c b/arch/x86/events/intel/uncore.c
> index 7857959c6e82..b69b6a21d46b 100644
> --- a/arch/x86/events/intel/uncore.c
> +++ b/arch/x86/events/intel/uncore.c
> @@ -1183,6 +1183,7 @@ static int uncore_pci_pmu_register(struct pci_dev *pdev,
> /* First active box registers the pmu */
> ret = uncore_pmu_register(pmu);
> if (ret) {
> + atomic_dec(&pmu->activeboxes);
> pmu->boxes[die] = NULL;
> uncore_box_exit(box);
> kfree(box);
> @@ -1248,6 +1249,9 @@ static void uncore_pci_pmu_unregister(struct intel_uncore_pmu *pmu, int die)
> {
> struct intel_uncore_box *box = pmu->boxes[die];
>
> + if (!box)
> + return;
> +
> pmu->boxes[die] = NULL;
> if (atomic_dec_return(&pmu->activeboxes) == 0)
> uncore_pmu_unregister(pmu);
> @@ -1272,7 +1276,6 @@ static void uncore_pci_remove(struct pci_dev *pdev)
> break;
> }
> }
> - WARN_ON_ONCE(i >= UNCORE_EXTRA_PCI_DEV_MAX);
> return;
> }
>
Reviewed-by: Dapeng Mi <dapeng1.mi@xxxxxxxxxxxxxxx>