Re: [PATCH v4 1/2] ACPI: CPPC: Add support for CPPC v4
From: Sumit Gupta
Date: Mon Jun 01 2026 - 14:10:29 EST
Hi Rafael,
On 01/06/26 23:05, Rafael J. Wysocki wrote:
External email: Use caution opening links or attachments
On Wed, May 27, 2026 at 9:47 PM Sumit Gupta <sumitg@xxxxxxxxxx> wrote:
CPPC v4 (ACPI 6.6, Section 8.4.6) adds two optional entries to theThis patch is good to go AFAICS, while there are still comments on the
_CPC package:
1. OSPM Nominal Performance (8.4.6.1.2.6): A write-only register that
lets OSPM inform the platform what it considers nominal performance.
The platform classifies performance above this level as boost and
below as throttle for its power/thermal decisions.
2. Resource Priority (8.4.6.1.2.7): A Package of Resource Priority
Register Descriptor sub-packages that allow OSPM to set relative
priority among processors for shared resources (boost, throttle,
L2/L3 cache, memory bandwidth). Parsing the full structure is not
yet supported; such entries are marked as unsupported.
Add v4 _CPC table parsing (25 entries) and update REG_OPTIONAL to
mark the two new registers as optional.
Signed-off-by: Sumit Gupta <sumitg@xxxxxxxxxx>
Reviewed-by: Mario Limonciello (AMD) <superm1@xxxxxxxxxx>
Reviewed-by: Pierre Gondois <pierre.gondois@xxxxxxx>
second one in the series.
Do you want me to apply this one separately?
Yes please. Patch 1 is independent of patch 2.
I will send patch 2 separately as a v5 after addressing the
review comments.
Thank you,
Sumit Gupta
---
drivers/acpi/cppc_acpi.c | 23 +++++++++++++++++------
include/acpi/cppc_acpi.h | 8 ++++++--
2 files changed, 23 insertions(+), 8 deletions(-)
diff --git a/drivers/acpi/cppc_acpi.c b/drivers/acpi/cppc_acpi.c
index f370be8715ae..c76cfafa3589 100644
--- a/drivers/acpi/cppc_acpi.c
+++ b/drivers/acpi/cppc_acpi.c
@@ -134,7 +134,7 @@ static DEFINE_PER_CPU(struct cpc_desc *, cpc_desc_ptr);
* cpc_regs[] with the corresponding index. 0 means mandatory and 1
* means optional.
*/
-#define REG_OPTIONAL (0x1FC7D0)
+#define REG_OPTIONAL (0x7FC7D0)
/*
* Use the index of the register in per-cpu cpc_regs[] to check if
@@ -751,18 +751,19 @@ int acpi_cppc_processor_probe(struct acpi_processor *pr)
/*
* Disregard _CPC if the number of entries in the return package is not
* as expected, but support future revisions being proper supersets of
- * the v3 and only causing more entries to be returned by _CPC.
+ * the v4 and only causing more entries to be returned by _CPC.
*/
if ((cpc_rev == CPPC_V2_REV && num_ent != CPPC_V2_NUM_ENT) ||
(cpc_rev == CPPC_V3_REV && num_ent != CPPC_V3_NUM_ENT) ||
- (cpc_rev > CPPC_V3_REV && num_ent <= CPPC_V3_NUM_ENT)) {
+ (cpc_rev == CPPC_V4_REV && num_ent != CPPC_V4_NUM_ENT) ||
+ (cpc_rev > CPPC_V4_REV && num_ent <= CPPC_V4_NUM_ENT)) {
pr_debug("Unexpected number of _CPC return package entries (%d) for CPU:%d\n",
num_ent, pr->id);
goto out_free;
}
- if (cpc_rev > CPPC_V3_REV) {
- num_ent = CPPC_V3_NUM_ENT;
- cpc_rev = CPPC_V3_REV;
+ if (cpc_rev > CPPC_V4_REV) {
+ num_ent = CPPC_V4_NUM_ENT;
+ cpc_rev = CPPC_V4_REV;
}
cpc_ptr->num_entries = num_ent;
@@ -845,6 +846,16 @@ int acpi_cppc_processor_probe(struct acpi_processor *pr)
cpc_ptr->cpc_regs[i-2].type = ACPI_TYPE_BUFFER;
memcpy(&cpc_ptr->cpc_regs[i-2].cpc_entry.reg, gas_t, sizeof(*gas_t));
+ } else if (cpc_obj->type == ACPI_TYPE_PACKAGE && (i - 2) == RESOURCE_PRIORITY) {
+ /*
+ * ACPI 6.6, s8.4.6.1.2.7 defines Resource Priority as a
+ * Package of Resource Priority Register Descriptor sub-packages.
+ * Parsing the full structure is not yet supported.
+ * Mark the register as unsupported for now.
+ */
+ pr_debug("CPU:%d Resource Priority not supported\n", pr->id);
+ cpc_ptr->cpc_regs[i-2].type = ACPI_TYPE_INTEGER;
+ cpc_ptr->cpc_regs[i-2].cpc_entry.int_value = 0;
} else {
pr_debug("Invalid entry type (%d) in _CPC for CPU:%d\n",
i, pr->id);
diff --git a/include/acpi/cppc_acpi.h b/include/acpi/cppc_acpi.h
index ee8352830c32..9b18fb9aab7c 100644
--- a/include/acpi/cppc_acpi.h
+++ b/include/acpi/cppc_acpi.h
@@ -17,16 +17,18 @@
#include <acpi/pcc.h>
#include <acpi/processor.h>
-/* CPPCv2 and CPPCv3 support */
+/* CPPCv2, CPPCv3 and CPPCv4 support */
#define CPPC_V2_REV 2
#define CPPC_V3_REV 3
+#define CPPC_V4_REV 4
#define CPPC_V2_NUM_ENT 21
#define CPPC_V3_NUM_ENT 23
+#define CPPC_V4_NUM_ENT 25
#define PCC_CMD_COMPLETE_MASK (1 << 0)
#define PCC_ERROR_MASK (1 << 2)
-#define MAX_CPC_REG_ENT 21
+#define MAX_CPC_REG_ENT 23
/* CPPC specific PCC commands. */
#define CMD_READ 0
@@ -110,6 +112,8 @@ enum cppc_regs {
REFERENCE_PERF,
LOWEST_FREQ,
NOMINAL_FREQ,
+ OSPM_NOMINAL_PERF,
+ RESOURCE_PRIORITY,
};
/*
--
2.34.1