Re: [PATCH v7 004/120] x86/cpuid: Introduce <asm/cpuid/leaf_types.h>

From: Maciej Wieczor-Retman

Date: Mon Jun 01 2026 - 10:34:57 EST


I know this was already merged in but as I couldn't reliably check 2k lines for
typos last time with my eyes only, I pushed it through my LLM kernel review.
While the typo in the comment doesn't matter much the ones in the struct field
names seem more relevant.

On 2026-05-28 at 17:37:26 +0200, Ahmed S. Darwish wrote:
...
>+ u32 xfrm_x87 : 1, // Enclave XFRM.X87
>+ xfrm_sse : 1, // Enclave XFRM.SEE

(line 714, comment doesn't match the struct field - sse vs SEE)

...
>+ u32 topa_output : 1, // ToPA output scheme
>+ topa_multiple_entries : 1, // ToPA tables can hold multiple entries
>+ single_range_output : 1, // Single-range output
>+ trance_transport_output : 1, // Trace Transport subsystem output

(line 774, 'trance' in the struct field should be 'trace' I think)

...

>+struct leaf_0x4c780002_0 {
>+ // eax
>+ u32 f00f : 1, // Intel F00F
>+ fdiv : 1, // FPU FDIV
>+ coma : 1, // Cyrix 6x86 coma
>+ amd_tlb_mmatch : 1, // AMD Erratum 383
>+ amd_apic_c1e : 1, // AMD Erratum 400
>+ bug_11ap : 1, // Bad local APIC aka 11AP
>+ fxsave_leak : 1, // FXSAVE leaks FOP/FIP/FOP
>+ clflush_monitor : 1, // AAI65, CLFLUSH required before MONITOR
>+ sysret_ss_attrs : 1, // SYSRET does not fix up SS attributes
>+ espfix : 1, // IRET to 16-bit SS corrupts ESP/RSP high bits (x86-32)
>+ null_seg : 1, // Setting a selector to NULL preserves the base
>+ swapgs_fence : 1, // SWAPGS without input dep on GS
>+ monitor : 1, // IPI required to wake up remote CPU
>+ amd_e400 : 1, // CPU is among the affected by Erratum 400
>+ cpu_meltdown : 1, // CPU affected by meltdown; needs kernel page table isolation
>+ spectre_v1 : 1, // CPU affected by Spectre variant 1 with conditional branches
>+ specture_v2 : 1, // CPU affected by Spectre variant 2 with indirect branches

(line 1383, 'specture_v2' should be 'spectre_v2'?)
...

--
Kind regards
Maciej Wieczór-Retman