Re: [PATCH v3 3/3] spi: tegra210-quad: Process small PIO transfers in hard IRQ context
From: Mark Brown
Date: Mon Jun 01 2026 - 10:10:15 EST
On Wed, May 20, 2026 at 07:24:05PM +0000, Vishwaroop A wrote:
> The 256-byte threshold (FIFO depth) ensures small transfers for devices
> like TPMs use the fast path, while larger transfers continue using
> workqueue.
> + /*
> + * For small PIO transfers (e.g., TPM), process directly in hard IRQ
> + * context unless there was a FIFO error. Error recovery calls
> + * device_reset() which can sleep, so must be deferred to workqueue.
> + */
> + if (!tqspi->is_curr_dma_xfer && tqspi->curr_dma_words <= QSPI_FIFO_DEPTH &&
> + !tqspi->tx_status && !tqspi->rx_status)
> + return handle_cpu_based_xfer(tqspi);
Is cur_dma_words always in the same units as QSPI_FIFO_DEPTH - I see
there's packed transfer support in the driver?
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