Re: [PATCH v2 2/5] dt-bindings: clock: qcom: Add Qualcomm Shikra Display clock controller

From: Dmitry Baryshkov

Date: Thu May 28 2026 - 09:49:54 EST


On Thu, May 28, 2026 at 03:37:03PM +0530, Imran Shaik wrote:
> The Qualcomm Shikra Display clock controller reuses the QCM2290 DISPCC,
> but has minor differences with the number of input clocks. Update the
> existing QCM2290 DISPCC bindings using conditional schema so that the
> QCM2290 requirements remain unchanged while accommodating the additional
> clocks required for Shikra.

According to the IPcat, display clock controller also has (unused)
inputs for the DSI1. Please extend the ABI for Agatti, then extend add
Shikra.

>
> Signed-off-by: Imran Shaik <imran.shaik@xxxxxxxxxxxxxxxx>
> ---
> .../bindings/clock/qcom,qcm2290-dispcc.yaml | 75 +++++++++++++++++-----
> 1 file changed, 60 insertions(+), 15 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/clock/qcom,qcm2290-dispcc.yaml b/Documentation/devicetree/bindings/clock/qcom,qcm2290-dispcc.yaml
> index 4a533b45eec2d8e7b866c3436bfe6f80fcd714fb..b24095814d9e67a355321d9013e144f245077322 100644
> --- a/Documentation/devicetree/bindings/clock/qcom,qcm2290-dispcc.yaml
> +++ b/Documentation/devicetree/bindings/clock/qcom,qcm2290-dispcc.yaml
> @@ -17,25 +17,21 @@ description: |
>
> properties:
> compatible:
> - const: qcom,qcm2290-dispcc
> + oneOf:
> + - items:
> + - enum:
> + - qcom,shikra-dispcc
> + - const: qcom,qcm2290-dispcc
> + - enum:
> + - qcom,qcm2290-dispcc
>
> clocks:
> - items:
> - - description: Board XO source
> - - description: Board active-only XO source
> - - description: GPLL0 source from GCC
> - - description: GPLL0 div source from GCC
> - - description: Byte clock from DSI PHY
> - - description: Pixel clock from DSI PHY
> + minItems: 6
> + maxItems: 9
>
> clock-names:
> - items:
> - - const: bi_tcxo
> - - const: bi_tcxo_ao
> - - const: gcc_disp_gpll0_clk_src
> - - const: gcc_disp_gpll0_div_clk_src
> - - const: dsi0_phy_pll_out_byteclk
> - - const: dsi0_phy_pll_out_dsiclk
> + minItems: 6
> + maxItems: 9
>
> required:
> - compatible
> @@ -45,6 +41,55 @@ required:
>
> allOf:
> - $ref: qcom,gcc.yaml#
> + - if:
> + properties:
> + compatible:
> + contains:
> + const: qcom,shikra-dispcc
> + then:
> + properties:
> + clocks:
> + items:
> + - description: Board XO source
> + - description: Board active-only XO source
> + - description: GPLL0 source from GCC
> + - description: GPLL0 div source from GCC
> + - description: Byte clock from DSI PHY0
> + - description: Pixel clock from DSI PHY0
> + - description: Byte clock from DSI PHY1
> + - description: Pixel clock from DSI PHY1
> + - description: Board sleep clock
> +
> + clock-names:
> + items:
> + - const: bi_tcxo
> + - const: bi_tcxo_ao
> + - const: gcc_disp_gpll0_clk_src
> + - const: gcc_disp_gpll0_div_clk_src
> + - const: dsi0_phy_pll_out_byteclk
> + - const: dsi0_phy_pll_out_dsiclk
> + - const: dsi1_phy_pll_out_byteclk
> + - const: dsi1_phy_pll_out_dsiclk
> + - const: sleep_clk
> + else:
> + properties:
> + clocks:
> + items:
> + - description: Board XO source
> + - description: Board active-only XO source
> + - description: GPLL0 source from GCC
> + - description: GPLL0 div source from GCC
> + - description: Byte clock from DSI PHY
> + - description: Pixel clock from DSI PHY
> +
> + clock-names:
> + items:
> + - const: bi_tcxo
> + - const: bi_tcxo_ao
> + - const: gcc_disp_gpll0_clk_src
> + - const: gcc_disp_gpll0_div_clk_src
> + - const: dsi0_phy_pll_out_byteclk
> + - const: dsi0_phy_pll_out_dsiclk
>
> unevaluatedProperties: false
>
>
> --
> 2.34.1
>

--
With best wishes
Dmitry