Re: [PATCH v2 3/4] usb: chipidea: tegra: Avoid controller/PHY init if bus is externally controlled

[Svyatoslav Ryhel]

сб, 23 трав. 2026 р. о 11:30 Svyatoslav Ryhel <clamor95@xxxxxxxxx> пише:
>
> If the USB controller and PHY are externally controlled, then the
> registration of the controller and the PHY initialization should be
> skipped, since these configurations must be done by the device that
> controls the bus to work correctly.
>
> Since USB PHY in Tegra controls clock gates required by the controller
> itself, Chipidea core PHY management is not suitable for Tegra.
>
> Signed-off-by: Svyatoslav Ryhel <clamor95@xxxxxxxxx>
> ---
>  drivers/usb/chipidea/ci_hdrc_tegra.c | 32 ++++++++++++++++++----------
>  1 file changed, 21 insertions(+), 11 deletions(-)
>

Hello there!

This patch is required because I could not find an acceptable way to
manually remove and add a platform device. I will explain the details
below and hope that someone can give me some suggestions on how to
handle this situation.

The Tegra USB controller is the root node, and it is bound and probed
automatically. This is perfectly fine for ordinary use cases. On the
other hand, the modem used in Tegra 3 devices requires the USB
controller to be registered at the exact moment when the modem is
ready to handle USB. If this window is not respected, the modem will
not expose the USB device, and all you get is a cascade of enumeration
failures.

The solution as I see it right now: The modem has a power sequencing
driver, and the USB controller can either be autoprobed and
unregistered in the pseq probe and then registered/unregistered in the
on/off sequences, or it can have a status = "reserved" set in the USB
node and manually register/unregister it during the pseq on/off
sequences. This would eliminate the need for this patch.

The problem I have faced is that I cannot properly and manually
control the USB controller driver to bind -> probe it and remove ->
unbind it from within powerseq.

Help is appreciated. Thanks!

Best regards,
Svyatoslav R.