Re: [RFC PATCH v2 0/8] timekeeping: Fix draft tracking precision and add feed-forward discipline via vmclock

[Miroslav Lichvar]

On Wed, May 20, 2026 at 01:21:46PM +0100, David Woodhouse wrote:
> On Wed, 2026-05-20 at 12:39 +0200, Miroslav Lichvar wrote:
> > On Tue, May 19, 2026 at 04:50:41PM +0100, David Woodhouse wrote:
> > > The design has two major purposes:
> > 
> > >  • Avoiding the redundant work of having *hundreds* of guests on the
> > >    same host *all* calibrating the same underlying oscillator, while
> > >    enjoying the added fun of steal time as they're trying to to so.
> > 
> > But isn't that work still duplicated, only moved to the kernel? 
> 
> Not the actual calibration of the TSC against real time, no. It is the
> *host* which gets the 1PPS signal and does all the work of tracking and
> smoothing the frequency drift over time. The guest basically gets the
> same as a vDSO, *telling* it a relationship from TSC to real time.

Ok, but I don't see why the phase corrections of the guest need to be
in the kernel.

> > I don't like the idea of adding more clock control loops to the kernel
> > much.
> 
> I completely agree. I am absolutely not planning to add any more clock
> control to the kernel than we already have. As you say, we probably
> have too many already.

If the vmclock driver is feeding the PLL with the offset between the
host and guest clocks, I think that would count as a loop.

> I'm not sure what scaling the guest TSC would buy us. Sure, it would
> minimise the frequency step at the moment of migration, but a naïve
> guest which isn't using vmclock's disruption signal is screwed on live
> migration *anyway*, because there's *also* a step change in the actual
> TSC value which is bounded by the real time synchronization of the
> source and destination host. 

The TSC offset can be corrected too. I thought that was already
happening.

> AFAICT scaling the TSC would just add complexity and wouldn't help
> much.

I think it's a better place to be solving this kind of problems. It's
compensating for a hardware change. It doesn't need to happen only at
migration. You could adjust the frequency continuously if you really
wanted, kind of like synchronous ethernet is doing for clocks over
network, improving the stability of the physical clock and phase
corrections are done on top of it at a higher level.

> And TSC scaling is pretty much x86-specific; other architectures have a
> *defined* counter frequency and don't need to support scaling.

There can be a software fallback if hardware scaling and/or offset is
not supported.

> > > > There is a work in progress for chrony to support MONOTONIC_RAW as the
> > > > main clock. It would be nice if that could be corrected in migrations.
> > > 
> > > Not sure I understand this. I thought the whole point of MONOTONIC_RAW
> > > is that it *isn't* skewed by NTP?
> > 
> > It isn't adjusted, but it can be used as a stable reference avoiding
> > the multiplier-induced jitter, interference from other processes, and
> > synchronization loops, e.g. when an NTP client is synchronizing to an
> > NTP server running on the same system (in different containers). 
> 
> We could just use the TSC for this, insted of MONOTONIC_RAW, couldn't
> we?

> (for TSC, read 'arch counter, timebase, etc.' — none of this is x86-
> specific but 'TSC' is quicker to type...)

Meaning userspace would have to duplicate the kernel's handling of
the counter (wrapping and scaling) just to avoid a single
multiplication in the vDSO?

-- 
Miroslav Lichvar