Re: [PATCH] arm64: dts: qcom: ipq5018: Correct CMN PLL reference clock rate

[George Moussalem]

On 5/20/26 20:18, Dmitry Baryshkov wrote:
> On Tue, May 19, 2026 at 09:56:06AM +0400, George Moussalem via B4 Relay wrote:
>> From: George Moussalem <george.moussalem@xxxxxxxxxxx>
>>
>> The correct CMN PLL reference clock rate for IPQ5018 is 4.8 GHz.
>>
>> The CMN PLL driver did not account for the ref clock divider which is 2
>> for IPQ5018. Therefore, the computed rate was twice the actual output.
>>
>> With the driver now accounting for the CMN PLL reference clock
>> divider (commit: 88c543fff756), set the correct reference clock rate.
>>
>> Fixes: c006b249c544 ("arm64: dts: ipq5018: Add CMN PLL node")
>>
>> Signed-off-by: George Moussalem <george.moussalem@xxxxxxxxxxx>
> 
> There should be no empty lines between tags.

thanks, will send an updated v2.
> 
>> ---
>>  arch/arm64/boot/dts/qcom/ipq5018.dtsi | 2 +-
>>  1 file changed, 1 insertion(+), 1 deletion(-)
>>
> 

Best regards,
George