Re: [PATCH] dma-debug: skip cacheline overlap tracking on cache-coherent architectures

[Mikhail Gavrilov]

On Tue, May 19, 2026 at 12:18 PM Christoph Hellwig <hch@xxxxxx> wrote:
>
> It is not.  We could require direct I/O to/from devices that are
> attached without DMA coherence to require cache line alignment.
>
> Now that Keith pushed down the checking into the driver that's even
> fairly easily doable.
>

Good to hear. Is there a posted series or branch I could look at?
If non-coherent DIO gets the alignment requirement, that addresses the
corruption case at the source rather than papering over it in debug,
which would be the cleaner outcome.

Happy to test on x86_64 when something is in flight (no non-coherent
hardware here, but at least the no-regression side is covered).

-- 
Best Regards,
Mike Gavrilov.