Re: [PATCH] ARM: dts: aspeed: anacapa: add JTAG CPLD TRST pin to SGPIO map
From: Andrew Jeffery
Date: Mon May 18 2026 - 01:12:59 EST
On Mon, 11 May 2026 17:47:56 +0800, Colin Huang wrote:
> Add JTAG_CPLD_TRST_R_N to the sgpiom0 pin name table on
> Facebook Anacapa BMC.
>
> This exposes the CPLD JTAG TRST signal through SGPIO,
> allowing proper JTAG reset control during debug.
>
>
> [...]
Thanks, I've applied this to the BMC tree.
--
Andrew Jeffery <andrew@xxxxxxxxxxxxxxxxxxxx>