[PATCH 2/2] arm64: dts: socfpga: Add dma-coherent to XGMAC nodes

[muhammad . nazim . amirul . nazle . asmade]

From: Nazim Amirul <muhammad.nazim.amirul.nazle.asmade@xxxxxxxxxx>

The SMMU is enabled and transactions going through it are cache
coherent. Add the dma-coherent property to the XGMAC nodes to prevent
redundant cache flush/invalidate operations and potential stale data
issues.

Signed-off-by: Nazim Amirul <muhammad.nazim.amirul.nazle.asmade@xxxxxxxxxx>
---
 arch/arm64/boot/dts/intel/socfpga_agilex3_socdk.dts         | 1 +
 arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts         | 1 +
 arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_013b.dts    | 1 +
 arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_modular.dts | 1 +
 arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_nand.dts    | 1 +
 5 files changed, 5 insertions(+)

diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex3_socdk.dts b/arch/arm64/boot/dts/intel/socfpga_agilex3_socdk.dts
index 25e17df0cbdb..2061d301126e 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex3_socdk.dts
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex3_socdk.dts
@@ -52,6 +52,7 @@ &gmac2 {
 	phy-mode = "rgmii-id";
 	phy-handle = <&emac2_phy0>;
 	max-frame-size = <9000>;
+	dma-coherent;
 
 	mdio0 {
 		compatible = "snps,dwmac-mdio";
diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts b/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts
index 66fc3c546b66..0af0b2e7d867 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk.dts
@@ -47,6 +47,7 @@ &gmac2 {
 	phy-mode = "rgmii-id";
 	phy-handle = <&emac2_phy0>;
 	max-frame-size = <9000>;
+	dma-coherent;
 
 	mdio0 {
 		#address-cells = <1>;
diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_013b.dts b/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_013b.dts
index 86137380df04..9bff6b57f19d 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_013b.dts
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_013b.dts
@@ -46,6 +46,7 @@ &gmac2 {
 	phy-mode = "rgmii-id";
 	phy-handle = <&emac2_phy0>;
 	max-frame-size = <9000>;
+	dma-coherent;
 
 	mdio0 {
 		#address-cells = <1>;
diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_modular.dts b/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_modular.dts
index e728cedb4cbd..6c61add0ef09 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_modular.dts
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_modular.dts
@@ -49,6 +49,7 @@ &gmac2 {
 	phy-mode = "rgmii-id";
 	phy-handle = <&emac2_phy0>;
 	max-frame-size = <9000>;
+	dma-coherent;
 
 	mdio0 {
 		compatible = "snps,dwmac-mdio";
diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_nand.dts b/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_nand.dts
index 33e6455ead0f..1a9d44e2bcb3 100644
--- a/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_nand.dts
+++ b/arch/arm64/boot/dts/intel/socfpga_agilex5_socdk_nand.dts
@@ -44,6 +44,7 @@ &gmac0 {
 	phy-mode = "rgmii-id";
 	phy-handle = <&emac0_phy0>;
 	max-frame-size = <9000>;
+	dma-coherent;
 
 	mdio0 {
 		#address-cells = <1>;
-- 
2.43.7